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參數資料
| 型號： | ISP1582BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Hi-Speed Universal Serial Bus peripheral controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC56 |
| 封裝： | 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56 |
| 文件頁數： | 13/66頁 |
| 文件大小： | 325K |
| 代理商： | ISP1582BS |
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Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Preliminary data
Rev. 03 — 25 August 2004
13 of 66
9397 750 13699
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
[1]
[2]
[3]
[4]
X: Don’t care.
Dead: The USB cable is plugged-out and V
CC(I/O)
is not available.
Plug-out: The USB cable is not present but V
CC(I/O)
is available.
Plug-in: The USB cable is being plugged-in and V
CC(I/O)
is available.
8.11 Interrupt
8.11.1
Interrupt output pin
The Interrupt Configuration register of the ISP1582 controls the behavior of the INT
output pin. The polarity and signaling mode of pin INT can be programmed by setting
bits INTPOL and INTLVL of the Interrupt Configuration register (R/W: 10h); see
Table 24
. Bit GLINTENA of the Mode register (R/W: OCh) is used to enable pin INT.
Default settings after reset are active LOW and level mode. When pulse mode is
selected, a pulse of 60 ns is generated when the OR-ed combination of all interrupt
bits changes from logic 0 to logic 1.
Figure 4
shows the relationship between the interrupt events and pin INT.
Each of the indicated USB and DMA events is logged in a status bit of the Interrupt
register and the DMA Interrupt Reason register, respectively. Corresponding bits in
the Interrupt Enable register and the DMA Interrupt Enable register determine
whether or not an event will generate an interrupt.
Interrupts can be masked globally by means of bit GLINTENA of the Mode register;
see
Table 21
.
Field CDBGMOD[1:0] of the Interrupt Configuration register controls the generation
of the INT signals for the control pipe. Field DDBGMODIN[1:0] of the Interrupt
Configuration register controls the generation of the INT signals for the IN pipe. Field
DDBGMODOUT[1:0] of the Interrupt Configuration register controls the generation of
the INT signals for the OUT pipe; see
Table 25
.
Table 3:
V
CC
ISP1582 pin status
[1]
V
CC(I/O)
State
Pin
RESET_N
X
X
X
LOW
HIGH
INT_N
X
LOW
LOW
HIGH
HIGH
SUSPEND
X
HIGH
HIGH
LOW
LOW
DREQ
X
high-Z
high-Z
high-Z
high-Z
DATA[15:0]
X
input
high-Z
high-Z
high-Z
0 V
0 V
0 V
>
3.3 V
3.3 V
3.3 V
V
CC
V
CC
V
CC
V
CC
V
CC
dead
[2]
plug-out
[3]
plug-in
[4]
reset
normal
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1582BS,518 | 功能描述:USB 接口集成電路 USB PERIPH CNTRLR RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1582BS,551 | 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1582BS,557 | 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1582BSGA | 功能描述:IC UBS CTRL HI-SPEED 56HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1582BS-S | 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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