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參數(shù)資料
型號: ISP1761BE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù): 82/158頁
文件大小: 724K
代理商: ISP1761BE
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
82 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
DW3
63
A
SW —
sets
HW —
resets
HW —
writes
Active
: Write the same value as that in V.
62
H
Halt
: The Halt bit is set when any microframe transfer status has a
stalled or halted condition.
Babble
: This bit corresponds to bit 1 of Status0 to Status7 for every
microframe transfer status.
Transaction Error
: This bit corresponds to bit 0 of Status0 to Status7
for every microframe transfer status.
Start/Complete
:
0 —
Start split
1 —
Complete split.
-
Data Toggle
: For an interrupt transfer, set correct bit to start the PTD.
61
B
HW —
writes
60
X
HW —
writes
59
SC
SW —
writes 0
HW —
updates
58
57
reserved
DT
-
HW —
writes
SW —
writes
HW —
writes
SW —
writes
56 to 55
Cerr[1:0]
Error Counter
: This field corresponds to the Cerr[1:0] field in QH.
00 —
The transaction will not retry.
11 —
The transaction will retry three times. Hardware will decrement
these values. When the transaction has tried three times, X error will be
updated.
-
Number of Bytes Transferred
: This field indicates the number of
bytes sent or received for this transaction.
54 to 44
43 to 32
reserved
NrBytes
Transferred
[11:0]
-
HW —
writes
DW2
31 to 24
23 to 8
reserved
DataStart
Address[15:0]
-
SW —
writes
-
Data Start Address
: This is the start address for the data that will be
sent or received on or from the USB bus. This is the internal memory
address and not the CPU address.
Bits 7 to 3 is the ms polling rate. Polling rate is defined as 2
(b
1)
μ
SOF;
where b = 4 to 16. When b is 4, every ms is executed.
b
Rate
μ
Frame[7:3]
5
2 ms
0 0001
6
4 ms
0 0010 or 0 0011
7
8 ms
0 0100 or 0 0111
8
16 ms
0 1000 or 0 1111
9
32 ms
1 0000 or 1 1111
7 to 0
μ
Frame[7:0]
SW —
writes
DW1
63 to 57
HubAddress
[6:0]
PortNumber
[6:0]
SW —
writes
Hub Address
: This indicates the hub address. Zero for the internal or
embedded hub.
Port Number
: This indicates the port number of the hub or embedded
TT.
56 to 50
SW —
writes
Table 74:
Bit
Start and complete split for interrupt: bit description
…continued
Symbol
Access
Description
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