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參數(shù)資料
| 型號(hào)： | L64005-F |
| 廠商： | LSI CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 192/272頁(yè) |
| 文件大小： | 1252K |
| 代理商： | L64005-F |
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L64005 MPEG-2 Audio/Video Decoder Technical Manual
A-9
Final Rev F
Copyright 1996 by LSI Logic Corporation. All rights reserved.
A.4.2
Precautions to
Avoid Bus
Contention
Avoid bus contention in all systems designed with 3-state bus drivers,
whether mixed voltage or single voltage. In a simple, single 5-V supply
system, if two bus drivers are enabled simultaneously with one device
driving a logic HIGH and the other driving a logic LOW, excessive current
can ow from the positive power rail to ground through the low-imped-
ance path formed by the two active drivers. This excessive current is
caused by two or more devices competing or contending for the same
bus line.
A system should be designed to clearly arbitrate for bus ownership to
avoid bus contention, and the excess current created by such contention.
Arbitration during normal operation can accomplish this design goal.
However, during system power-up, the arbitration logic may not initially
function properly until a general reset cycle has been performed. There-
fore, all bus drivers should be held in 3-state mode using a power-on-
reset signal until the system logic that performs arbitration is enabled.
The signals at the host interface of the L64005 are 3-stated if the CS is
deasserted. The designer should take care and deassert CS during
power-on procedure.
In mixed voltage systems that use the L64005 with 5-V compatible I/Os,
bus contention can occur not only between two competing drivers, but
also between a 5-V IC and the L64005 IC’s 5-V compatible output if both
are driving a logic HIGH. Thus, in mixed voltage systems using the
L64005, design the system to avoid bus contention, including power-on
to a High-Z state.
A.4.3
Precautions
During Power
Failure
Latchup is not a concern in power-failure mode. If, during the course of
normal device operation, the 3.3-V supply to L64005 fails, but the system
5-V supply remains active, you can apply 5-V logic levels to a powered
down L64005. Although extended exposure of L64005 to 5-V signals dur-
ing power failure is not recommended, there are no restrictions as long
as VIN does not exceed the absolute maximum rating of 6.5 V.
To minimize over-voltage stress during power failure, you should either
link the power supplies to prevent this condition or drive all 5-V signals
connected to L64005 LOW when a 3.3-V power supply fails until you
deactivate the 5-V supply.
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相關(guān)代理商/技術(shù)參數(shù) |
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| L64010ADC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier/Accumulator |
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| L64010ADM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier/Accumulator |
| L64010ADMB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier/Accumulator |
| L64010ADMC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Multiplier/Accumulator |
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