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參數資料
| 型號： | L64222 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數： | 30/32頁 |
| 文件大小： | 248K |
| 代理商： | L64222 |
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L64222 DVD Audio/Video Decoder
7
The L64222 features both PCM DAC and S/P DIF interfaces. The serial
PCM DAC interface provides two multiplexed channels of decoded audio
on each of four output lines at a bit rate of 32 bits per sample for each
channel. It also supports a CD Bypass mode for connecting the outputs
of an external audio decoder through the DAC Interface.
The S/P DIF interface outputs IEC61937 formatted and IEC60958
encoded compressed or PCM bitstreams at 16, 20, or 24 bits per
sample. The host can direct the input or output of the audio decoder to
be sent to the formatter. An S/P DIF Bypass mode allows an external
S/P DIF formatted input to be switched to the output interface.
The Audio Decoder module includes circuitry that maintains the correct
audio output sample rate based upon an internally generated or one of
several external audio clock inputs. A bit clock, a left/right channel clock,
and an oversampling clock are included as outputs to the external DAC.
The same clock circuits provide a 2 x bit rate clock and a left/right
channel clock to the IEC60958 Encoder.
Error Concealment
The L64222 can detect data in the bitstream that does not meet
MPEG-2 or Dolby Digital syntax or grammar rules and can ag the data
for exception processing. Hardware error handling is limited to error
masking and the application of concealment vectors in video. Audio error
concealment is limited to muting on errors and searching for error-free
frames. The L64222 ags gross errors in the bitstream due to channel
buffer overow or underow or to nonconformance in the bitstream. The
L64222 ags the errors so that they may be masked in the display or the
audio output. An external microcontroller may be programmed to execute
mechanisms to recover from gross errors.
Host Interface
The Host Interface includes all of the control and status registers, read
and write FIFOs, and byte enable logic. The host and L64222
communicate exclusively through the registers. An external interrupt
signal from the L64222 alerts the host when register contents are
changed. Separate I/O signals are used for handshaking. The L64222
supports either an Intel or Motorola type processor.
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