- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄30731 > LC72715PW (SANYO SEMICONDUCTOR CO LTD) SPECIALTY CONSUMER CIRCUIT, PQFP64 PDF資料下載
參數(shù)資料
| 型號： | LC72715PW |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, SQFP-64 |
| 文件頁數(shù)： | 13/26頁 |
| 文件大?。?/td> | 167K |
| 代理商： | LC72715PW |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁
LC72715PW
No.A1650-20/26
Error Correction
(1) Error Correction and Output Conditions of Error-corrected Data (in the default state)
The received data is subject to error detection by the layer 2 CRC and error correction by the (272,190) code for each
one block (272 bits). At the end of correction, preparation for transmission to CPU is made and the INT signal is output.
This is called “horizontal correction”.
In the default state, this INT signal is output only when the output data concerned meets all of three conditions as
follows:
Data whose error correction is completed and for which layer 2 CRC detects no error
Data received during block and frame synchronizations
Data in the data packet
*Depending on the register mode setting, horizontally-corrected data may be output regardless of conditions of
to
above.
When horizontal correction cannot cover completely, correction by the product code is made frame by frame. For data
that cannot be horizontally corrected, the second horizontal correction is made.
This series of operations is called “vertical correction”. Conditions for the data obtained from vertically-corrected
output are as follows in the default state:
Data that cannot be corrected by horizontal correction, but that has been completely corrected by the vertical
correction
Data in the data packet
Accordingly, horizontally-corrected data is not output. Packet data that cannot be corrected horizontally or vertically
is not output. The parity packet data after vertical correction is not output either.
Vertical correction is applied to the whole packet data that have been received during frame synchronization, and is
executed when horizontal correction cannot correct all packet (block) data. Vertical correction is not made when the
error-free data is received for one frame or when the received data is not in flame synchronization during reception.
For the packet whose error has been corrected by horizontal correction and any error-free packet, vertical correction is
not made to prevent faulty correction.
In the default setting, the applicable vertically-corrected output is not output when vertical correction has not been
made.
* Depending on the register mode setting, the vertically-corrected data may be output regardless of whether or not
vertical correction is to be made.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC72720NM | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
| LC72720NM | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
| LC72720N | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| LC72720N | SPECIALTY CONSUMER CIRCUIT, PDIP24 |
| LC72720YV | SPECIALTY CONSUMER CIRCUIT, PDSO30 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC72717PW | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast (DARC) Receiver IC |
| LC72720 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System LSI |
| LC72720M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System LSI |
| LC72720N | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System LSI |
| LC72720NM | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Single-Chip RDS Signal-Processing System LSI |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。