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| 型號： | LC89057W-VF4 |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, SQFP-48 |
| 文件頁數(shù)： | 18/61頁 |
| 文件大小： | 570K |
| 代理商： | LC89057W-VF4 |
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LC89057W-VF4
No.7202-25/61
9.4 Error Output Processing
9.4.1 Lock error and data error output (RERR)
RERR outputs an error flag when a PLL lock error or a data error occurs.
It is possible to treat non-PCM data reception as an error by the RESEL setting.
The RERR output conditions are set with RESTA. Since the PLL status can be output at all times, the PLL status can
be always monitored, even when the clock source is XIN.
9.4.2 PLL lock error
The PLL gets unlocked for input data that lost bi-phase modulation regularity, or input data for which preambles B, M,
and W cannot be detected.
RERR turns to "H" upon occurrence of a PLL lock error, and returns to "L" when data demodulation returns to normal
and "H" is maintained for somewhere between 45ms and 300ms.
The rising and falling edges of RERR are synchronized with RLRCK.
9.4.3 Input data parity error
Odd number of errors among parity bits in input data and input parity errors are detected.
If an input parity error occurs 9 or more times in succession, RERR turns to "H" indicating that the PLL is locked, and
after holding "H" for somewhere between 45ms and 300ms, it returns to "L".
The error flag output format can be selected with REDER, when an input parity error is output less than 9 times in
succession.
9.4.4 Other errors
Even if RERR turns to "L", the channel status bits of 24 to 27 (sampling frequency) are always fetched and the data of
the previous block is compared with the current data. Moreover, the input data sampling frequency is calculated from
the fs clock extracted from the input data, and the fs calculated value compared in a same way as described above. If
any difference is detected in these data, RERR is instantly made "H" and the same processing as for PLL lock errors
is carried out.
The PLL causes a lock error when the fs changes as described above. However, in order to support sources with a
variable fs (for example a CD player with a variable pitch function), it is possible to set with FSERR not to output an
error flag unless fs changes exceeding the PLL capture range.
Moreover, in the FSERR setting, when the PLL is locked, RERR is turned to “L” without reflecting the fs calculation
result to the error flag concerning input data within reception range by FSLIM[1:0].
If a setting which regard non-PCM data input as an error is made, RERR turns to “H” when non-PCM data input is
detected. At this time, the PLL locked status and various output clocks are subject to the input data, but the output
data is muted.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC89057W-VF4AD-E | 制造商:ON Semiconductor 功能描述: |
| LC89057W-VF4A-E | 功能描述:音頻發(fā)送器、接收器、收發(fā)器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
| LC89057W-VF4A-TBM-E | 制造商:ON Semiconductor 功能描述: 制造商:ON Semiconductor 功能描述:AUDIO I/F RECEIVER |
| LC89058W | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:CMOS IC Digital Audio Interface Receiver |
| LC89058WA-E | 功能描述:音頻發(fā)送器、接收器、收發(fā)器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
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