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參數資料
| 型號： | LC89057W-VF4 |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, SQFP-48 |
| 文件頁數： | 42/61頁 |
| 文件大小： | 570K |
| 代理商： | LC89057W-VF4 |
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LC89057W-VF4
No.7202-47/61
CCB address: 0xE8, Command address: 9; Demodulation function: RERR output setting
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
1
0
1
0
CAU
CAL
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
ERWT1
ERWT0
FSERR
RESTA
XTWT1
XTWT0
REDER
RESEL
RERR output contents setting
0: PLL lock error or data error (initial value)
1: PLL lock error or data error or non-PCM data
REDER
Setting of parity error flag output within 8 times in a row
0: Output only when non-PCM data is recognized. (initial value)
1: Output only during sub-frame for which error was generated.
XTWT[1:0]
Setting of clock switch wait time after PLL is unlocked
00: Clock switching after approx. 200
s from when oscillation amplifier starts (initial value)
01: Clock switching after approx. 100
s from when oscillation amplifier starts
10: Clock switching after approx. 50
s from when oscillation amplifier starts
11: Clock switching after approx. 400
s from when oscillation amplifier starts
RESTA
RERR output condition setting
0: Output PLL status all the time. (Output PLL status even during XIN source) (initial status)
1: Forcibly output error (Set "H" to RERR forcibly).
FSERR
Setting of error flag output condition according to fs change
0: Reflect fs changes to error flag. (initial value)
1: Don't reflect fs changes to error flag.
ERWT[1:0]
Setting of RERR wait time after PLL is locked
00: Cancel error after preamble B is counted 48. (initial value)
01: Cancel error after preamble B is counted 24.
10: Cancel error after preamble B is counted 12.
11: Cancel error after preamble B is counted 6.
For Non-PCM data, the data defined with AOSEL is reflected. In other words, it is identical to the detected data
output to
____________
AUDIO.
Output data is muted if an error occurs due to non-PCM data with RESEL.
The RESTA setting is not reflected to the output pins of data and clock.
For FSERR, the fs calculation result obtained while the oscillation amplifier is stopped is not reflected. In this case, fs
changes consist of only channel status fs information.
ERWT[1:0] defines the interval of time for RERR to output error cancellation ("L") after PLL is locked. Since
demodulated audio data is output after RERR cancels an error, you need to change this setting if the situation that the
head of data is missing is a problem.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LC89057W-VF4AD-E | 制造商:ON Semiconductor 功能描述: |
| LC89057W-VF4A-E | 功能描述:音頻發送器、接收器、收發器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
| LC89057W-VF4A-TBM-E | 制造商:ON Semiconductor 功能描述: 制造商:ON Semiconductor 功能描述:AUDIO I/F RECEIVER |
| LC89058W | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:CMOS IC Digital Audio Interface Receiver |
| LC89058WA-E | 功能描述:音頻發送器、接收器、收發器 RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
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