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參數資料
| 型號： | LM1246AAA/NA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24 |
| 封裝： | PLASTIC, DIP-24 |
| 文件頁數： | 22/51頁 |
| 文件大?。?/td> | 2794K |
| 代理商： | LM1246AAA/NA |
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LM1246 Address Map (Continued)
Note that the pixels in the first line immediately below the character may be overwritten by the pixel override system that creates
the button box. (Refer to the Button Box Formation Section for more information).
After the first line, each new line always starts with an SL code, even if the number of skipped lines to follow is zero. This means
an SL code must always follow an EOL code. An EOL code may follow an SL code if several ’transparent’ lines are required
between sections of the window. See example 3 below for a case where skipped lines of zero characters are displayed, resulting
in one window being displayed in two segments.
End-Of-Screen Code
To signify the end of the window, a special End-Of-Screen (EOS) code is used in place of a End-Of-Line (EOL) code. There must
be at least one EOS code in the Page RAM to avoid unpredictable behavior. This can be accomplished by clearing the RAM by
writinga0tobit3ofthe FRMCTRL1 Register, 0x8400, immediately after power up.
TABLE 12. End-Of-Screen Code
ATTRIBUTE CODE
END-OF-SCREEN CODE
ATT[3:0]
000000000
Bits 8–0 are all zeros. Bits 12–9 will have the previously entered AC but this is not used and so these bits are “don’t cares”.
OSD CONTROL REGISTERS
These registers, shown in Table 13. OSD Control Register Detail, control the size, position, enhanced features and ROM bank
selection of up to two independent OSD windows. Any bits marked as “X” are reserved and should be written to with zeros and
should be ignored when the register is read. Additional register detail is provided in the Control Register Definitions Section, later
in this document.
TABLE 13. OSD Control Register Detail
Register
Address
Default
D7
D6
D5
D4
D3
D2
D1
D0
FRMCTRL1
0x8400
0x98
HTD
ASZEN
FEN
TD
CDPR
D2E
D1E
OSE
FRMCTRL2
0x8401
0x80
PIXELS_PER_LINE[2:0]
BLINK_PERIOD[4:0]
CHARFONTACC
0x8402
0x00
XXXXXX
ATTR
FONT4
VBLANKDUR
0x8403
0x10
X
VBLANK_DURATION[6:0]
CHARHTCTRL
0x8404
0x51
CHAR_HEIGHT[7:0]
BBHLCTRLB0
0x8405
0xFF
B[1:0]
G[2:0]
R[2:0]
BBHLCTRLB1
0x8406
0x01
XXXXXXX
B[2]
BBLLCTRLB0
0x8407
0x00
B[1:0]
G[2:0]
R[2:0]
BBLLCTRLB1
0x8408
0x00
XXXXXXX
B[2]
CHSDWCTRLB0
0x8409
0x00
B[1:0]
G[2:0]
R[2:0]
CHSDWCTRLB1
0x840A
0x00
XXXXXXX
B[2]
ROMSIGCTRL
0x840D
0x00
XXXXXXX
CRS
ROMSIGDATAB0
0x840E
0x00
CRC[7:0]
ROMSIGDATAB1
0x840F
0x00
CRC[15:8]
HSTRT1
0x8410
0x62
HPOS[7:0]
VSTRT1
0x8411
0x32
VPOS[7:0]
W1STRTADRL
0x8412
0x00
ADDR[7:0]
W1STRTADRH
0x8413
0x00
XXXXXXX
ADDR[8]
COLWIDTH1B0
0x8414
0x00
COL[7:0]
COLWIDTH1B1
0x8415
0x00
COL[15:8]
COLWIDTH1B2
0x8416
0x00
COL[23:16]
COLWIDTH1B3
0x8417
0x00
COL[31:24]
HSTRT2
0x8418
0x56
HPOS[7:0]
VSTRT2
0x8419
0x5B
VPOS[7:0]
W2STRTADRL
0x841A
0x00
ADDR[7:0]
W2STRTADRH
0x841B
0x01
XXXXXXX
ADDR[8]
COLWIDTH2B0
0x841C
0x00
COL[7:0]
COLWIDTH2B1
0x841D
0x00
COL[15:8]
COLWIDTH2B2
0x841E
0x00
COL[23:16]
LM1246
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LM1246AAC/NA | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述:IC 150MHZ RGB PREAMP 1246 DIP24 |
| LM1246AAC/NA/NOPB | 功能描述:IC PREAMP RGB 150MHZ 24-DIP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| LM1246NA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
| LM1247 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
| LM1247AAG/NA | 功能描述:IC PREAMP CMOS 150MHZ 24DIP RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
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