- 您現在的位置：買賣IC網 > PDF目錄30743 > LM1253AAE/NA (NATIONAL SEMICONDUCTOR CORP) ON-SCREEN DISPLAY IC, PDIP28 PDF資料下載
參數資料
| 型號： | LM1253AAE/NA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDIP28 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-28 |
| 文件頁數： | 20/61頁 |
| 文件大小： | 1671K |
| 代理商： | LM1253AAE/NA |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁
Micro-Controller Interface
The micro-controller interfaces to the LM1253A pre-amp via
an I
2C interface. The protocol of the interface begins with a
Start Pulse followed by a byte comprised of a seven bit Slave
Device Address and a Read/Write bit. Since the first byte is
composed of both the address and the read/write bit the
address of the LM1253A for writing is BAh (1011 1010) and
the address for reading is BBh (1011 1011). The develop-
ment software provided by National Semiconductor will au-
tomatically take care of the difference between the read and
write addresses if the target address under the communica-
tions tab is set to BAh.
Figures 39, 40 show a write and read
sequence across the I
2C interface.
Write Sequence
The write sequence begins with a start condition which
consists of the master pulling SDA low while SCL is held
high. The slave device address is next sent. The address
byte is made up of an address of seven bits (7-1) and the
read/write bit (0). Bit 0 is low to indicate a write operation.
Each byte that is sent is followed by an acknowledge. When
SCL is high the master will release the SDA line. The slave
must pull SDA low to acknowledge. The register to be written
to is next sent in two bytes, the least significant byte being
sent first. The master can then send the data, which consists
of one or more bytes. Each data byte is followed by an
acknowledge bit. If more than one data byte is sent the data
will increment to the next address location. See
Figure 39.
Read Sequence
Read sequences are comprised of two I
2C transfer se-
quences: The first is a write sequence that only transfers the
two byte address to be accessed. The second is a read
sequence that starts at the address transferred in the previ-
ous address only write access and increments to the next
address upon every data byte read. This is shown in
Figure
40.
DS101265-45
FIGURE 39. I
2C Write Sequence
LM1253A
www.national.com
27
相關PDF資料 |
PDF描述 |
|---|---|
| LM1267NA/NOPB | 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24 |
| LM1269NA/NOPB | 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24 |
| LM1276AAA/NA | 1 CHANNEL, VIDEO PREAMPLIFIER, PDIP28 |
| LM1279AN/NOPB | 3 CHANNEL, VIDEO AMPLIFIER, PDIP20 |
| LM1279N/NOPB | 1 CHANNEL, VIDEO AMPLIFIER, PDIP20 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LM1253AN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator |
| LM-1256 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16 x 16 matrix displays |
| LM-1256_1 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16】16 matrix displays |
| LM-1256LB1 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16】16 matrix displays |
| LM125AN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:VOLTAGE REGULATORS |
發布緊急采購，3分鐘左右您將得到回復。