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參數資料
| 型號： | LM1253AAE/NA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 畫面疊加 |
| 英文描述： | ON-SCREEN DISPLAY IC, PDIP28 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-28 |
| 文件頁數： | 3/61頁 |
| 文件大小： | 1671K |
| 代理商： | LM1253AAE/NA |
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Pin Descriptions (Continued)
R
LIMITH is set to limit the input current into the IC to a
maximum value of +1 mA during flyback and 150 A during
normal forward scan. For example if an h flyback with a peak
of 100V is used, R
LIMITH = 100 k.The internal input imped-
ance of pin 14 is low to limit the maximum voltage swing at
the input to within the supply rail and ground. The IC inter-
face circuit creates a digital signal from this waveform, which
is used as the blanking signal, and termed HBLANK. This
signal is used by the video amplifier for blanking the video
and by the OSD generator as the horizontal sync reference
for the PLL.
Loss of the horizontal flyback pulse implies that the monitor
is not scanning, and therefore no image is being displayed.
The HBLANK pulse is still required by the LM2453 CRT
driver in order to maintain correct bias conditions in the CRT
until the power supplies are switched off, but video will be set
at black level to prevent front of screen problems, using the
NO_VID line. See also the
Loss of Horizontal Flyback sec-
tion.
Figure 29 shows the external schematic of pin 14, Figure 18
shows the internal schematic.
Pin 15 — V Flyback This is an analog signal from the moni-
tor vertical scan. The analog waveform is AC coupled and
fed to the input of the IC via a current limiting resistor to
prevent the positive and negative excursions of the signal
causing excessive current or voltage swing at the input to the
IC. See
Figure 10.
R
LIMITV is set to limit the maximum input voltage swing into
the IC to less than the supply rails. The input to the IC is
positive edge triggered, and ignores the falling edge. Be-
cause of horizontal rate noise on the waveform, the input
buffer incorporates hysteresis, triggering at a positive going
threshold of V
VTH+ and a negative going threshold of VVTH.
The input buffer produces a digital signal VSTART which is
used to start the VBLANK timer. The positive rising edge of
VSTART sets a counter timer, which counts horizontal peri-
ods using the HBLANK signal. The timer resets VBLANK
when it reaches the value preset in the register VCOUNT
(set by the micro-controller over I
2C). While the output
VBLANK is active, an AND function prevents any further
transitions on the VSTART waveform from retriggering the
counter.
The positive edge of the VSTART signal is initially transmit-
ted through to VBLANK through an OR function, as the timer
may take up to one horizontal line period to begin timing the
duration of the pulse. The application must ensure that the
DS101265-13
FIGURE 9. H Flyback Input Pulse
LM1253A
www.national.com
11
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LM1253AN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator |
| LM-1256 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16 x 16 matrix displays |
| LM-1256_1 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16】16 matrix displays |
| LM-1256LB1 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16】16 matrix displays |
| LM125AN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:VOLTAGE REGULATORS |
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