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參數(shù)資料
| 型號： | MC68C912B32FU8 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-Bit Microcontroller |
| 中文描述： | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數(shù)： | 30/128頁 |
| 文件大小： | 748K |
| 代理商： | MC68C912B32FU8 |
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MOTOROLA
30
MC68HC912B32
MC68HC912B32TS/D
The 32-Kbyte Flash EEPROM can be mapped to either the upper or lower half of the 64-Kbyte address
space. When mapping conflicts occur, registers, RAM and EEPROM have priority over Flash EEPROM.
To use memory expansion the part must be operated in one of the expanded modes.
This register can be read anytime. In normal modes MISC can be written once; in special modes it can
be written anytime.
NDRF — Narrow Data Bus for Register-Following Map
This bit enables a narrow bus feature for the 512-byte register-following map. In expanded narrow (eight
bit) modes, single-chip modes, and peripheral mode, NDRF has no effect. The register-following map
always begins at the byte following the 512-byte register map. If the registers are moved this space will
also move.
0 = Register-following map space acts as a full 16-bit data bus
1 = Register-following map space acts the same as an 8-bit external data bus
RFSTR1, RFSTR0 — Register-Following Stretch Bit 1 and Bit 0
These bits determine the amount of clock stretch on accesses to the 512-byte register-following map. It
is valid regardless of the state of the NDRF bit. In single-chip and peripheral modes this bit has no
meaning or effect.
EXSTR1, EXSTR0 — External Access Stretch Bit 1 and Bit 0
These bits determine the amount of clock stretch on accesses to the external address space. In single-
chip and peripheral modes this bit has no meaning or effect.
MAPROM — Map Location of Flash EEPROM
This bit determines the location of the on-chip Flash EEPROM. In expanded modes it is reset to zero.
In single-chip modes it is reset to one. If ROMON is zero, this bit has no meaning or effect.
0 = Flash EEPROM is located from $0000 to $7FFF
1 = Flash EEPROM is located from $8000 to $FFFF
MISC —
Miscellaneous Mapping Control Register
$0013
Bit 7
6
5
4
3
2
1
Bit 0
0
NDRF
RFSTR1
RFSTR0
EXSTR1
EXSTR0
MAPROM
ROMON
RESET:
0
0
0
0
0
0
0
0
Table 11 Register-Following Stretch-Bit Definition
Stretch Bit RFSTR1 Stretch Bit RFSTR0 E Clocks Stretched
0
0
0
1
1
0
1
1
0
1
2
3
Table 12 Expanded Stretch-Bit Definition
Stretch Bit EXSTR1 Stretch Bit EXSTR0 E Clocks Stretched
0
0
0
1
1
0
1
1
0
1
2
3
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