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參數資料
型號: MC68HC05C8A
廠商: Motorola, Inc.
英文描述: Microcontrollers
中文描述: 微控制器
文件頁數: 153/158頁
文件大小: 773K
代理商: MC68HC05C8A
MC68HSC05C8A
4.5-V to 5.5-V High-Speed SPI Timing
MC68HC05C8A
MC68HCL05C8A
MC68HSC05C8A
Rev. 5.0
Technical Data
MOTOROLA
MC68HSC05C8A
153
B.7 4.5-V to 5.5-V High-Speed SPI Timing
The data in
13.11 5.0-V Serial Peripheral Interface Timing
applies to
the MC68HSC05C8A with the exceptions given here.
Num
Characteristic
Symbol
Min
Max
Unit
Operating frequency
Master
Slave
f
OP(M)
f
OP(S)
dc
dc
0.5
4.1
f
OP
MHz
1
Cycle time
Master
Slave
t
CYC(M)
t
CYC(S)
2.0
244
t
CYC
ns
2
Enable lead time
Master
Slave
t
Lead(M)
t
L
ead(S)
(1)
122
ns
ns
3
Enable lag time
Master
Slave
t
Lag(M)
t
Lag(S)
(1)
366
ns
ns
4
Clock (SCK) high time
Master
Slave
t
W(SCKH)M
t
W(SCKH)S
166
93
ns
ns
5
Clock (SCK) low time
Master
Slave
t
W(SCKL)M
t
W(SCKL)S
166
93
ns
ns
6
Data setup time (inputs)
Master
Slave
Data hold time (inputs)
Master
Slave
Slave access time (time to data active from high-impedance state)
Slave disable time (hold time to high-impedance state)
Data valid
Master (before capture edge)
Slave (after enable edge)
(2)
Data hold time (outputs)
Master (after capture edge)
Slave (After Enable Edge)
Rise time (20% V
DD
to 70% V
DD
, C
L
= 200 pF)
SPI outputs (SCK, MOSI, and MISO)
SPI inputs (SCK, MOSI, MISO, and SS)
Fall time (70% V
DD
to 20% V
DD
, C
L
= 200 pF)
SPI outputs (SCK, MOSI, and MISO)
SPI inputs (SCK, MOSI, MISO, and SS)
t
SU(M)
t
SU(S)
49
49
ns
ns
7
t
H(M)
t
H(S)
t
A
t
DIS
49
49
0
61
122
ns
ns
ns
ns
8
9
10
t
V(M)
t
V(S)
0.25
122
t
CYC(M)
ns
11
t
HO(M)
t
HO(S)
0.25
0
t
CYC(M)
ns
12
t
RM
t
RS
50
1.0
ns
μ
s
13
t
FM
t
FS
50
1.0
ns
μ
s
1. Signal production depends on software.
2. Assumes 200 pF load on all SPI pins.
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