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參數(shù)資料
型號: MC68HC05C8A
廠商: Motorola, Inc.
英文描述: Microcontrollers
中文描述: 微控制器
文件頁數(shù): 84/158頁
文件大小: 773K
代理商: MC68HC05C8A
Serial Communications Interface (SCI)
Technical Data
MC68HC05C8A
MC68HCL05C8A
MC68HSC05C8A
Rev. 5.0
84
Serial Communications Interface (SCI)
MOTOROLA
FE
Receiver Framing Error Flag
This clearable, read-only flag is set when there is a logic 0 where a
stop bit should be in the character shifted into the receive shift
register. If the received word causes both a framing error and an
overrun error, the OR bit is set and the FE bit is not set. Clear the FE
bit by reading the SCSR, and then reading the SCDR. Reset clears
the FE bit.
1 = Framing error
0 = No framing error
9.6.5 Baud Rate Register
The baud rate register (BAUD) selects the baud rate for both the receiver
and the transmitter.
SCP1 and SCP0
SCI Prescaler Select Bits
These read/write bits control prescaling of the baud rate generator
clock, as shown in
Table 9-1
. Resets clear both SCP1 and SCP0.
Address: $000D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
SCP1
SCP0
0
SCR2
SCR2
SCR0
Write:
Reset:
0
0
0
0
0
U
U
U
U = Unaffected
Figure 9-8. Baud Rate Register (BAUD)
Table 9-1. Baud Rate Generator Clock Prescaling
SCP0
SCP1
Baud Rate Generator Clock
00
Internal clock divided by 1
01
Internal clock divided by 3
10
Internal clock divided by 4
11
Internal clock divided by 13
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