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參數(shù)資料
型號： MC68HC05X4DW
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： HCMOS Microcontroller Unit
中文描述： 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 81/156頁
文件大小： 926K
代理商： MC68HC05X4DW
Motorola CAN
Interface to the MC68HC05X4 CPU
MC68HC05X4 Rev 1.0
MOTOROLA
Motorola CAN
81
13-mcan
RRB — Release receive buffer
When set this releases the receive buffer currently attached to the
CPU, allowing the buffer to be reused by the MCAN. This may result
in another message being received, which could cause another
receive interrupt request (if RIE is set). This bit is cleared
automatically when a message is received, i.e. when the RS bit (see
MCAN status register (CSTAT)
) becomes set.
1 = Released – receive buffer is available to the MCAN.
0 = No action.
AT — Abort transmission
When this bit is set a pending transmission will be cancelled if it is not
already in progress, allowing the transmit buffer to be loaded with a
new (higher priority) message when the buffer is released. If the CPU
tries to write to the buffer when it is locked, the information will be lost
without being signalled. The status register can be checked to see if
transmission was aborted or is still in progress.
1 = Present – Abort transmission of any pending messages.
0 = No action.
TR — Transmission request
1 = Present – Depending on the transmission buffer’s content, a
data frame or a remote frame will be transmitted.
0 = No action. This will not cancel a previously requested
transmission; the abort transmission command must be used
to do this.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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