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參數資料
| 型號： | MCM6949YJ8R |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 1M x 4 Bit Static Random Access Memory |
| 中文描述： | 1M X 4 STANDARD SRAM, 8 ns, PDSO32 |
| 封裝： | 0.400 INCH, SOJ-32 |
| 文件頁數： | 9/10頁 |
| 文件大小： | 122K |
| 代理商： | MCM6949YJ8R |
MCM6949
9
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled; See Notes 1, 2, and 3)
Parameter
Symbol
b l
MCM6949–8
MCM6949–10
MCM6949–12
MCM6949–15
U i
Unit
Notes
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
tAVAV
tAVEL
tAVEH
tAVEH
tELEH,
tELWH
8
—
10
—
12
—
15
—
ns
4
Address Setup Time
0
—
0
—
0
—
0
—
ns
Address Valid to End of Write
7
—
9
—
10
—
12
—
ns
Address Valid to End of Write (G High)
7
—
8
—
9
—
10
—
ns
Enable Pulse Width
8
—
9
—
10
—
12
—
ns
5, 6
Enable Pulse Width (G High)
tELEH,
tELWH
7
—
8
—
9
—
10
—
ns
5, 6
Data Valid to End of Write
tDVEH
tEHDX
tEHAX
5
—
5
—
6
—
7
—
ns
Data Hold Time
0
—
0
—
0
—
0
—
ns
Write Recovery Time
0
—
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state.
4. All write cycle timing is referenced from the last valid address to the first transitioning address.
5. If E goes low coincident with or after W goes low, the output will remain in a high–impedance condition.
6. If E goes high coincident with or before W goes high, the output will remain in a high–impedance condition.
DATA VALID
HIGH–Z
tAVAV
tAVEH
tAVEL
tELWH
tEHAX
tDVEH
tEHDX
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
tELEH
WRITE CYCLE 2
(E Controlled; See Notes 1, 2, and 3)
Motorola Memory Prefix
Part Number
Package (YJ = 400 mil SOJ)
Shipping Method (R = Tape and Reel, Blank = Rails)
Speed (8 = 8 ns, 10 = 10 ns, 12 = 12 ns,
15 = 15 ns)
MCM 6949
XX XX XX
ORDERING INFORMATION
(Order by Full Part Number)
Full Part Numbers — MCM6949YJ8
MCM6949YJ10
MCM6949YJ10R
MCM6949YJ12
MCM6949YJ12R
MCM6949YJ15
MCM6949YJ15R
MCM6949YJ8R
相關PDF資料 |
PDF描述 |
|---|---|
| MCM6949YJ10 | 1M x 4 Bit Static Random Access Memory |
| MCM6949YJ10R | 1M x 4 Bit Static Random Access Memory |
| MCM6949YJ12R | 1M x 4 Bit Static Random Access Memory |
| MCM6949YJ15 | 1M x 4 Bit Static Random Access Memory |
| MCM6949YJ15R | 1M x 4 Bit Static Random Access Memory |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MCM69C232 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4K x 64 CAM |
| MCM69C232TQ20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4K x 64 CAM |
| MCM69C232TQ20R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4K x 64 CAM |
| MCM69C233TQ15 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MCM69C233WD | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MPC8260 PowerQUICC II-TM to CAM Interfacing ? MCM69C233 |
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