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參數資料
型號: MICRF405YML TR
廠商: Micrel Inc
文件頁數: 10/46頁
文件大小: 649K
描述: TRANSMITTER ASK/FSK 24-MLF
標準包裝: 1
頻率: 290MHz ~ 980MHz
應用: ISM
調制或協議: ASK,FSK
數據傳輸率 - 最大: 200 kbps
功率 - 輸出: 10dBm
電流 - 傳輸: 18mA
數據接口: PCB,表面貼裝
天線連接器: PCB,表面貼裝
電源電壓: 2.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
封裝/外殼: 24-VFQFN 裸露焊盤,24-MLF?
包裝: 標準包裝
產品目錄頁面: 571 (CN2011-ZH PDF)
其它名稱: 576-1965-6
Micrel
MICRF405
 
 
 
 
April 2006 
10
M9999-041906
 (408) 955-1690
 
SEN
SIO
SCK
Register address
Data to write
into register
Internal load pulse
generated here
A6 A5A4 A3 A2 A1 A0R/W
D7 D6D5D4D3D2D1 D0
 
Figure 2. Writing to One Address.
 
In Figure 2, SIO is changed at positive edges of
SCK. The MICRF405 samples the SIO line at
negative edges. The value of the R/W bits is always
0 for writing.
Writing to All Registers
Writing to all register can be done at any time. To
get the simplest firmware, always write to all
registers. The price to pay for the simplicity is
increased write-time, which leads to increased time
to change the way the MICRF405 works. If data is
transferred through DATAIN pin write address 0-23
(address 24-29 is dont care). If data is transferred
through SPI write address 0-28 (Address 29 is only
written   to   during   data   transfer,   not   during
configuration).
What to write
Field
Comments
Address:
0000000 (address of the first register to write to, which is 0)
R/W bit:
0 for writing
Values:
1
st
  Octet: wanted values for ControlRegister0. 2
nd
 Octet: wanted values for ControlRegister1 and
so on for all of the octets.
Table 5. When writing to All Registers, totally 25/30 (5 are optional) octets are clocked into the MICRF405.
 
How to write:
" Bring SEN low
" Use SCK and SIO to clock in the 25/30 octets
" Bring SEN high
Refer to Figure 3. Writing to n Registers Having
Incremental Addresses.
Writing to n Registers Having Incremental
Addresses
In addition to entering all bytes, it is also possible to
enter a set of n bytes, starting from address i = A6,
A5, & A0. Typical example: Clock in a new set of
frequency dividers (i.e. change the RF frequency).
Registers to be written are located in i, i+1, i+2.
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