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參數資料
| 型號： | MR18R162GAF0-CT9 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | (16Mx16)x2(4/8/16)pcs RIMM Module based on 256Mb A-die, 32s banks,16K/32ms Ref, 2.5V |
| 中文描述： | （16Mx16顯示）× 2（4/8/16）件RIMM的模塊，基于256Mb阿芯片，32秒銀行，16K/32ms參考，為2.5V |
| 文件頁數： | 4/16頁 |
| 文件大小： | 419K |
| 代理商： | MR18R162GAF0-CT9 |
Page 3
Version 1.4 July 2002
MR16R1622(4/8/G)AF0
MR18R1622(4/8/G)AF0(1)
Table 3: Module Connector Pad Description
Signal
Pins
I/O
Type
Description
Gnd
A1, A3, A5, A7, A9, A11, A13, A15,
A17, A19, A21, A23, A25, A27, A29,
A31, A33, A39, A52, A60, A62, A64,
A66, A68, A70, A72, A74, A76, A78,
A80, A82, A84, A86, A88, A90, A92,
B1, B3, B5, B7, B9, B11, B13, B15,
B17, B19, B21, B23, B25, B27, B29,
B31, B33, B39, B52, B60, B62, B64,
B66, B68, B70, B72, B74, B76, B78,
B80, B82, B84, B86, B88, B90, B92
Ground reference for RDRAM core and interface. 72 PCB
connector pads.
LCFM
B10
I
RSL
Clock from master. Interface clock used for receiving RSL
signals from the Channel. Positive polarity.
LCFMN
B12
I
RSL
Clock from master. Interface clock used for receiving RSL
signals from the Channel. Negative polarity.
LCMD
B34
I
V
CMOS
Serial Command used to read from and write to the control
registers. Also used for power management.
LCOL4..
LCOL0
A20, B20, A22, B22, A24
I
RSL
Column bus. 5-bit bus containing control and address infor-
mation for column accesses.
LCTM
A14
I
RSL
Clock to master. Interface clock used for transmitting RSL
signals to the Channel. Positive polarity.
LCTMN
A12
I
RSL
Clock to master. Interface clock used for transmitting RSL
signals to the Channel. Negative polarity.
LDQA8..
LDQA0
A2, B2, A4, B4, A6, B6, A8, B8, A10
I/O
RSL
Data bus A. A 9-bit bus carrying a byte of read or write data
between the Channel and the RDRAM device. LDQA8 is
non-functional on modules with x16 RDRAM devices
LDQB8..
LDQB0
B32, A32, B30, A30, B28, A28, B26,
A26, B24
I/O
RSL
Data bus B. A 9-bit bus carrying a byte of read or write data
between the Channel and the RDRAM device. LDQB8 is non-
functional on modules with x16 RDRAM devices.
LROW2..
LROW0
B16, A18, B18
I
RSL
Row bus. 3-bit bus containing control and address information
for row accesses.
LSCK
A34
I
V
CMOS
Serial Clock input. Clock source used to read from and write
to the RDRAM control registers.
NC
A16, B14, A38, B38, A40, B40, A43,
B43, A44, B44, A45, B45, A46, B46,
A47, B47, A48, B48, A49, B49, A50,
B50, A77, B79
These pads are not connected. These 24 connector pads are
reserved for future use.
RCFM
B83
I
RSL
Clock from master. Interface clock used for receiving RSL
signals from the Channel. Positive polarity.
RCFMN
B81
I
RSL
Clock from master. Interface clock used for receiving RSL
signals from the Channel. Negative polarity.
RCMD
B59
I
V
CMOS
Serial Command Input. Pin used to read from and write to the
control registers. Also used for power management.
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