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參數(shù)資料
| 型號： | MX812J |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | Codec |
| 英文描述： | VSR CODEC WITH DRAM CONTROL |
| 中文描述： | 振動時(shí)效編解碼器DRAM的控制 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 115K |
| 代理商： | MX812J |
DATA BULLETIN
MX812
VSR CODEC WITH
DRAM CONTROL
PRELIMINARY INFORMATION
Features and Applications
Half-Duplex Voice Storage and Retrieval
Selectable Sample Rates and “Memory
Size”
MX812DW
28-pin SOIC
MX812J
28-pin CDIP
Serial Bus
μ
Processor Control
On-Chip DRAM Controller
Up To 2 Minutes of High-Quality
Recorded Audio
Answering Functions and Voice-
Notepad
Low-Power 5-Volt CMOS
Figure 1 - MX812 Voice Store and Retrieve Codec
CLOCK
EXTERNAL
DRAM
1 or 2 x
1Mbit
DRAM
Chips
or
1 x
4Mbit
DRAM
Chip
SERIAL CLOCK
COMMAND DATA
REPLY DATA
IRQ
CHIP SELECT
CLOCK
GENERATOR
AUDIO IN
AUDIO OUT
V
BIAS
E
BIAS
WE
CAS
RAS1
A10/R2
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D
DGND
V
DD
V
SS
POWER METER
STATUS REGISTER
MODE REGISTER
CV S D
CODEC
DEMOD
STORE/PLAY/WAIT COMMAND BUFFER
DRAM
CONTROL
MOD
SERIAL
C-BUS
INTERFACE
and
LOGIC
1997 MX
COM Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tele: 800 638-5577 910 744-5050 Fax: 910 744-5054
Doc. # 20480076.003
All trademarks and service marks are held by their respective companies.
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