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參數(shù)資料
型號(hào): NCN6004AFTBR2
廠商: ON SEMICONDUCTOR
元件分類: 其它接口
英文描述: Dual SAM/SIM Interface Integrated Circuit
中文描述: SPECIALTY INTERFACE CIRCUIT, PQFP48
封裝: PLASTIC, TQFP-48
文件頁數(shù): 28/40頁
文件大小: 329K
代理商: NCN6004AFTBR2
NCN6004A
http://onsemi.com
28
CRD_CLK
CLOCK_IN
CLOCK : 2
CLOCK : 4
CLOCK : 8
A0
A1
A2
A3
Clock is updated upon CLOCK :8 rising edge
T
I
CLOCK programming is activated
by the PGM rising edge.
C
CARD_SEL
Figure 25. Clock Programming Timings
CS
PGM
The example given in Figure 25 highlights the delay
coming
from
the
internal
re-synchronization. Since the clock signal is asynchronous,
it is up to the programmer to make sure the next card
transaction is not activated before, respectively, either the
clock
duty
cycle
CRD_CLK_A or CRD_CLK_B signal has been updated.
Generally speaking, such a delay can be derived from the
maximum
clock
frequency
interface.
provided
to
the
Figure 26. Card Clock 1/2 Divider Operation
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