- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376255 > PSD303V-A-90JM (意法半導(dǎo)體) Single Output LDO, 3.0A, Fixed(1.5V), Fast Transient Response, Low Quiescent Current 5-DDPAK/TO-263 0 to 70 PDF資料下載
參數(shù)資料
| 型號(hào)： | PSD303V-A-90JM |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Single Output LDO, 3.0A, Fixed(1.5V), Fast Transient Response, Low Quiescent Current 5-DDPAK/TO-263 0 to 70 |
| 中文描述： | 低成本現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備 |
| 文件頁(yè)數(shù)： | 23/85頁(yè) |
| 文件大小： | 691K |
| 代理商： | PSD303V-A-90JM |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)當(dāng)前第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)
PSD3XX Famly
20
CS8/CS9/CS10
From PAD
To PAD
A16/A17/A18
Latched Address
Input
Q
D
En
Logic Input
D
E
M
U
X
Address In or
Chip Select Out
Input or Output
Set by PSDsoft
2
PSDsoft
2
Port C I/O
1
(PC0/PC1/PC2)
ALE
NOTES:
1. Port C pins can be individually configured as inputs
or
outputs, but
not
both. Pins can be individually
configured as address or logic and latched or transparent, except for the 3X1 devices, which must be
set to all address or all logic.
2. PSDsoft sets this configuration prior to run-time based on your PSDsoft design file.
Figure 7. Port C (PC0-PC2) Pin Structure
10.4 Port C (PC0-PC2)
Each pin of Port C (Figure 7) can be configured as an input to PAD A and PAD B, or as an
output from PAD B. As inputs, the pins are referenced as A16-A18. Although the pins are
given this reference, they can be used for
any
address
or
logic input. [For example, A8-A10
could be connected to those pins to improve the resolution (boundaries) of CS0-CS7 to 256
bytes.] How they are defined in the PSDsoft design file determines:
Whether they are address or logic inputs
Whether the input is transparent or latched by the trailing edge of ALE/AS.
Notes:
1) If the inputs are addresses, they are routed to PAD A and PAD B, and can be used in
any or all PAD equations.
2) A logic input is routed to PAD B and can be used for Boolean equations that are
implemented in any or all of the CS0-CS10 PAD B outputs.
Alternately, PC0-PC2 can become CS8-CS10 outputs, respectively, providing the user with
more external chip-select PAD outputs. Each of the signals (CS8-CS10) is comprised of
one product term.
10.
I/OPort
Functions
(
cont.)
10.5 ALE/AS Input Pin
The ALE/AS pin may be used as a generic logic input signal to the PADs if a
non-multiplexed MCU configuration is chosen in PSDsoft.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD312-20J | High Speed PWM Controller 20-PLCC 0 to 70 |
| PSD312-20JI | Low Cost Field Programmable Microcontroller Peripherals |
| PSD312-20JM | High Speed PWM Controller 16-SOIC 0 to 70 |
| PSD312-25J | Low Cost Field Programmable Microcontroller Peripherals |
| PSD312-25JI | High Speed PWM Controller 16-SOIC 0 to 70 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD304R-12JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD304R-12LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD304R-12LM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD304R-12U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD304R-12UI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。