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參數(shù)資料
| 型號： | Q67100-Q1838 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Anti-Static Storage Bags; External Height:18"; External Width:18"; Features:Zipper closure, Amine-free, Noncorrosive; Material:Vapor-Coated Alum. Shield Bonded between Polyester Outer & Polyethylene Inner Layers RoHS Compliant: NA |
| 中文描述： | 64兆位同步DRAM |
| 文件頁數(shù)： | 21/53頁 |
| 文件大?。?/td> | 418K |
| 代理商： | Q67100-Q1838 |
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HYB39S64400/800/160BT(L)
64MBit Synchronous DRAM
Semiconductor Group
20
Timing Diagrams
1. Bank Activate Command Cycle
2. Burst Read Operation
3. Read Interrupted by a Read
4. Read to Write Interval
4.1 Read to Write Interval
4.2 Minimum Read to Write Interval
4.3 Non-Minimum Read to Write Interval
5. Burst Write Operation
6. Write and Read Interrupt
6.1 Write Interrupted by a Write
6.2 Write Interrupted by Read
7. Burst Write & Read with Auto-Precharge
7.1 Burst Write with Auto-Precharge
7.2 Burst Read with Auto-Precharge
8. Burst Termination
8.1 Termination of a full Page Burst Write Operation
8.2 Termination of a full Page Burst Write Operation
9. AC- Parameters
9.1 AC Parameters for a Write Timing
9.2 AC Parameters for a Read Timing
10. Mode Register Set
11. Power on Sequence and Auto Refresh (CBR)
12. Clock Suspension (using CKE)
12. 1 Clock Suspension During Burst Read CAS Latency = 2
12. 2 Clock Suspension During Burst Read CAS Latency = 3
12. 3 Clock Suspension During Burst Write CAS Latency = 2
12. 4 Clock Suspension During Burst Write CAS Latency = 3
13. Power Down Mode and Clock Suspend
14. Self Refresh ( Entry and Exit )
15. Auto Refresh ( CBR )
16. Random Column Read ( Page within same Bank)
16.1 CAS Latency = 2
16.2 CAS Latency = 3
17. Random Column Write ( Page within same Bank)
17.1 CAS Latency = 2
17.2 CAS Latency = 3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Q67100-Q1841 | BAG 3X5 SHIELDED ZIP LOCK |
| Q67100-Q1844 | BAG 4X6 SHIELDED ZIP LOCK |
| Q67100-Q2776 | BAG 5X8 SHIELDED ZIP LOCK |
| Q67100-Q2781 | BAG 6X10 SHIELDED ZIP LOCK |
| Q67100-Q2800 | BAG 8X10 SHIELDED ZIP LOCK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Q67100-Q1841 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:64-MBit Synchronous DRAM |
| Q67100-Q1844 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:64-MBit Synchronous DRAM |
| Q67100-Q2001 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8M x 32-Bit Dynamic RAM Module |
| Q67100-Q2002 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 64-Bit Dynamic RAM Module |
| Q67100-Q2003 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 64-Bit Dynamic RAM Module |
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