欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: RM7000-250T
廠商: PMC-SIERRA INC
元件分類: 微控制器/微處理器
英文描述: RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released
中文描述: 64-BIT, 250 MHz, RISC PROCESSOR, PBGA304
封裝: 31 X 31 MM, TBGA-304
文件頁數: 28/54頁
文件大小: 901K
代理商: RM7000-250T
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer
s Internal Use
Document ID: PMC-2002175, Issue 1
28
RM7000
Microprocessor with On-Chip Secondary Cache Datasheet
Released
Figure 8 Typical Embedded System Block Diagram
4.26 System Address/Data Bus
The 64-bit System Address Data (
SysAD
) bus is used to transfer addresses and data between the
RM7000 and the rest of the system. It is protected with an 8-bit parity check bus,
SysADC
.
The system interface is configurable to allow easy interfacing to memory and I/O systems of
varying frequencies. The data rate and the bus frequency at which the RM7000 transmits data to
the system interface are programmable via boot time mode control bits. Also, the rate at which the
processor receives data is fully controlled by the external device. Therefore, either a low cost
interface requiring no read or write buffering or a faster, high-performance interface can be
designed to communicate with the RM7000. Again, the system designer has the flexibility to make
these price/performance trade-offs.
4.27 System Command Bus
The RM7000 interface has a 9-bit System Command (
SysCmd
) bus. The command bus indicates
whether the
SysAD
bus carries an address or data. If the
SysAD
bus carries an address, then the
SysCmd
bus also indicates what type of transaction is to take place (for example, a read or write).
If the
SysAD
bus carries data, then the SysCmd bus also gives information about the data (for
example, this is the last data word transmitted, or the data contains an error). The
SysCmd
bus is
bidirectional to support both processor requests and external requests to the RM7000. Processor
requests are initiated by the RM7000 and responded to by an external device. External requests are
issued by an external device and require the RM7000 to respond.
The RM7000 supports one to eight byte and 32-byte block transfers on the
SysAD
bus. In the case
of a sub-doubleword transfer, the 3 low-order address bits give the byte address of the transfer, and
the
SysCmd
bus indicates the number of bytes being transferred.
4.28 Handshake Signals
There are ten handshake signals on the system interface. Two of these,
RdRdy*
and
WrRdy*
, are
used by an external device to indicate to the RM7000 whether it can accept a new read or write
RM7000
Memory I/O
Controller
DRAM
Flash/
Boot
ROM
Control
Address
x
x
72
PCI Bus
72
25
Latch
72
8
Tertiary Cache
(optional)
72
SysAD Bus
TcLine, etc.
SysCmd
相關PDF資料
PDF描述
RM7000-263S RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released
RM7000-266T RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released
RM7000-300S RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released
RM7000-300T RM7000⑩ Microprocessor with On-Chip Secondary Cache Datasheet Released
RM7935 64-bit Microprocessors with Integrated L2 Cache and EJTAG
相關代理商/技術參數
參數描述
RM7000263S 制造商:QED 功能描述:*
RM7000-263S 制造商:QED 功能描述:Microprocessor, 64 Bit, 304 Pin, Plastic, BGA 制造商:Quantum Effect Design 功能描述:Microprocessor, 64 Bit, 304 Pin, Plastic, BGA
RM7000-266T 制造商:QED 功能描述:Microprocessor, 64 Bit, 304 Pin, Plastic, BGA
RM7000-300T 制造商:QED 功能描述: 制造商:QED 功能描述:Microprocessor, 64 Bit, 304 Pin, Plastic, BGA
RM7000A 制造商:PMC 制造商全稱:PMC 功能描述:64-Bit MIPS RISC Microprocessor with Integrated L2 Cache
主站蜘蛛池模板: 稷山县| 潜山县| 张家界市| 莲花县| 大丰市| 彭泽县| 黄山市| 望江县| 五河县| 阿拉善盟| 塔城市| 旅游| 邵阳市| 岳西县| 宜章县| 清水河县| 耒阳市| 双江| 顺昌县| 阿拉善左旗| 巧家县| 朝阳县| 盐亭县| 岐山县| 满城县| 农安县| 即墨市| 六枝特区| 澄江县| 华坪县| 乐业县| 潢川县| 老河口市| 垫江县| 东明县| 宣城市| 顺昌县| 财经| 科尔| 揭阳市| 承德县|