- 您現在的位置：買賣IC網 > PDF目錄98229 > THS8083CPZP (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PQFP100 PDF資料下載
參數資料
| 型號： | THS8083CPZP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | POWER, THERMALLY ENHANCED, PLASTIC, TQFP-100 |
| 文件頁數： | 55/61頁 |
| 文件大小： | 266K |
| 代理商： | THS8083CPZP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁當前第55頁第56頁第57頁第58頁第59頁第60頁第61頁
A–1
Appendix A
PLL Formula and Register Settings
If:
F(XTL) = frequency of external crystal or master clock connected to XTL1 input of THS8083
F(VCO) = frequency of THS8083–internal VCO
F(DTO) = frequency of THS8083–internal DTO
F(DTOCLK) = frequency of externally available DTO clock output
F(HS) = frequency of HS input
CLKDIV = clock output divider setting
VCODIV = feedback divider in THS8083–internal analog PLL loop
TERMCNT = feedback divider in THS8083–internal digital PLL loop
DTO_INC = DTO increment (when NOM_INC is programmed, DTO_INC is initialized to NOM_INC)
Then:
F(VCO) = F(XTL) x VCODIV
F(DTO) = 31 x F(VCO) / DTO_INC
F(DTOCLK) = F(DTO) / CLKDIV
AND, if PLL is locked:
F(DTOCLK) = TERMCNT * F(HS)
Summarizing:
DTO_INC = [31xF(XTL)xVCODIV] / [F(DTOCLK)xCLKDIV]
The formats of DTO_INC and NOM_INC:
Both are 33 bit values, consisting of a 6-bit integer and a 27-bit fractional part. So, in hexadecimal notation,
the value is between 00.0000000hex and 3F.7FFFFFFhex. The decimal value of the increment is: <integer
part>.<fractional part interpreted as integer value>x2^(–27).
Due to the architecture of the DTO, to all increment values with an integer part higher than 31, 1 needs to be
added when programming the register.
For example:
Actual increment –> Programmed increment
30.0
–>
30.0
31.0
–>
31.0
32.0
–>
33.0
Additional restrictions:
– CLKDIV should be chosen such that the programmed increment NOM_INC falls within the range [28.62]
Examples:
1.
For generating the XGA@75Hz pixel clock of 78.75 MHz, with F(XTL) = 14.31818 MHz & VCODIV=8:
NOM_INC = [31x14.31818x8]/[78.75x1] = 45.090802
Since this is higher than 31, the programmed value needs to be 46.090802. Converting this to the 6bit.27bit
notation, gives us 2E.0B9F645.
To achieve lock with an incoming HS, TERMCNT is programmed with 1312 (i.e., the total number of pixels
per line in this mode).
相關PDF資料 |
PDF描述 |
|---|---|
| THS8133ACPHP | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| THS8133BCPHP | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| THS8133BCPHPG4 | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| THS8133CPHP | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| THS8134BCPHP | PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| THS8083EVM | 制造商:Texas Instruments 功能描述:THS8083EVM - Bulk |
| THS8083T | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Triple 8-Bit, 80 MSPS, 3.3-V Video and Graphics Digitizer With Digital PLL |
| THS8-10R-D | 制造商:Thomas & Betts 功能描述:CATAMOUNT CABLE TIES |
| THS8133 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION WITH TRI-LEVEL SYNC GENERATION |
| THS8133_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION WITH TRI-LEVEL SYNC GENERATION |
發布緊急采購，3分鐘左右您將得到回復。