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參數(shù)資料
| 型號： | TLE6266G |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 封裝： | 18 MM, PLASTIC, SOP-28 |
| 文件頁數(shù)： | 50/50頁 |
| 文件大小： | 1020K |
| 代理商： | TLE6266G |
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Datasheet TLE 6266 G
Version 2.21
9
July 29th, 2005
Vbat stand-by Mode
In the Vbat stand-by mode the CAN transmitter and receiver stage are deactivated, to
achieve a low power consumption. All other functions are active as in the normal mode
(see Table 3). The CANL line is pulled-up to battery supply voltage via the RTL output
and CANH pulled to GND via RTH. A wake-up request via a CAN message on the bus
is immediately reported to the microcontroller by setting RxD=LOW. The wake pin WK
is not active in this mode. A power-on condition (Vbat pin is supplied) or a watchdog reset,
automatically switches the TLE 6266 to Vbat stand-by mode. Also if the supply voltage
drops below the specified limits (undervoltage reset), the transceiver is automatically
switched to Vbat stand-by mode or power down mode, respectively.
Cyclic Wake Modes
In the cyclic wake operation mode the lowest power consumption is achieved. This mode
consists of two states, the Cyclic HS ON and the Cyclic HS OFF mode. Everytime the
cyclic HS ON mode is entered (from all other modes), a long open window is started.
In the HS ON state the transmitter, receiver and all switches, except the HS3 switch, are
deactivated. The CANL line is pulled-up to battery supply voltage via the RTL output and
CANH pulled to GND via RTH. A wake-up via CAN bus message sets the RxD output to
LOW. Everytime the cyclic HS ON mode is entered , a long open window is started. If
there is no valid watchdog trigger or a PWM transition into the HS OFF state during this
time, a watchdog reset is activated. Only a correct trigger signal on the PWM pin causes
a transition into the cyclic HS OFF state. This is called the “failsafe PWM” feature.
In the HS OFF state, almost all functions of the IC are deactivated(also HS3-switch).
Only the wake-up input, the oscillator and the power-on reset circuit are activated. The
oscillator is used to realize the HS3-cyclic wake function.This automatically switches to
HS ON state after a programed time, to enabled HS3 (see Table 2).The CANL line is
pulled-up to battery supply voltage via the RTL output and CANH pulled to GND via RTH.
Only the wake up via CAN message sets the RxD to low (visible in HS ON state).
There are three possibilities to enter the cyclic HS ON mode from the HS OFF mode:
- the cyclic wake function
- a CAN bus wake
- a rising edge at the wake-up pin
Table 2
SPI Bit settings for the cyclic wake function
Input Bit 13
Input Bit12
Period
# of Cycles
(1 cycle = 512s typ.)
0048ms
94
0196ms
188
10192ms
376
1
no cyclic wake-up
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