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參數(shù)資料
| 型號： | TLV320ADC3101IRGER |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC24 |
| 封裝： | GREEN, PLASTIC, VQFN-24 |
| 文件頁數(shù)： | 15/84頁 |
| 文件大?。?/td> | 1363K |
| 代理商： | TLV320ADC3101IRGER |
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LD(n)
LD(n+1)
2
1
0
3
0
3
2
1
3
RD(n)
LEFTCHANNEL
RIGHTCHANNEL
LD(n)=n'thsampleofleftchanneldate
RD(n)=n'thsampleofrightchanneldate
WORD
CLOCK
BIT
CLOCK
DATA
n-1 n-2 n-3
LD(n)
LD(n+1)
2
1
0
3
0
3
2
1
RD(n)
LEFT CHANNEL
RIGHT CHANNEL
LD(n) = nth Sample of Left-Channel DatA
RD(n) = nth Sample of Right-Channel Data
WORD
CLOCK
BIT
CLOCK
DATA
n-1 n-2 n-3
Ch_Offset_1 = 1
LD(n)
LD (n+1)
2
1
0
3
0
3
2
1
3
RD(n)
LEFT CHANNEL
RIGHT CHANNEL
WORD
CLOCK
BIT
CLOCK
DATA
n-1 n-2 n-3
Ch_Offset_1 = 0
SLAS553A – NOVEMBER 2008 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com
Figure 26. DSP Mode (Standard Timing)
Figure 27 shows the DSP mode timing with Ch_Offset_1 = 1.
Figure 27. DSP Mode With Ch_Offset_1 = 1
Figure 28 shows the DSP mode timing with Ch_Offset_1 = 0 and bit clock inverted.
Figure 28. DSP Mode With Ch_Offset_1 = 0, Bit Clock Inverted
For DSP mode, the number of bit clocks per frame should be greater than twice the programmed word length of
the data. Also, the programmed offset value should be less than the number of bit clocks per frame by at least
the programmed word length of the data.
Figure 29 shows the DSP time-slot-based mode without channel swapping, and with Ch_Offset_1 = 0 and
Ch_Offset_2 = 3. The MSB of left channel data is valid on the first falling edge of the bit clock after the rising
edge of the word clock. Because the right channel has an offset of 3, the MSB of its data is valid on the third
falling edge of the bit clock after the LSB of the left-channel data. As in the case of other modes, the serial output
bus is put in the high-impedance state, if 3-stating of the output is enabled, during all the extra bit-clock cycles in
the frame.
22
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s) :TLV320ADC3101
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| TLV320ADC3101IRGET | 功能描述:音頻模/數(shù)轉換器 IC 92dB (16B) Low Power Stereo ADC RoHS:否 制造商:Wolfson Microelectronics 轉換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風格: 封裝 / 箱體: 封裝: |
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| TLV320AIC10C | 制造商:TI 制造商全稱:Texas Instruments 功能描述:General-Purpose 3V to 5.5V 16-bit 22-KSPS DSP CODEC |
| TLV320AIC10CGQER | 功能描述:接口—CODEC 16-Bit 22-KSPS DSP Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC10CPFB | 功能描述:接口—CODEC 16-Bit 22-KSPS DSP Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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