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參數資料
| 型號： | TLV320ADC3101IRGER |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC24 |
| 封裝： | GREEN, PLASTIC, VQFN-24 |
| 文件頁數： | 50/84頁 |
| 文件大小： | 1363K |
| 代理商： | TLV320ADC3101IRGER |
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SLAS553A – NOVEMBER 2008 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com
Page 0 / Register 49: INT2 Interrupt Control
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7–D5
R
000
Reserved. Do not write any value other than reset value.
D4
R/W
0
0: ADC AGC noise interrupt is not used in the generation of INT2 interrupt.
1: ADC AGC noise interrupt is used in the generation of INT2 interrupt.
D3
R
0
Reserved. Do not write any value other than reset value.
D2
R/W
0
0: Engine-generated interrupts and overflow flags are not used in the generation of INT2 interrupt.
1: Engine-generated interrupts and overflow flags are used in the generation of INT2 interrupt.
D1
R/W
0
0: ADC data-available interrupt is not used in the generation of INT2 interrupt.
1: ADC data-available interrupt is used in the generation of INT2 interrupt.
D0
R/W
0
0: INT2 is only one pulse (active high) of duration typical 2 ms.
1: INT2 is multiple pulses (active high) of duration typical 2 ms and period 4 ms, until flag register 42 or
45 is read by the user.
Page 0 / Register 50: Reserved
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7–D0
R
XXXX XXXX
Reserved. Do not write to this register.
Page 0 / Register 51: DMCLK/GPIO2 Control
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7–D6
R
00
Reserved. Do not write any value other than reset value.
D5–D2
R/W
0000
0000: DMCLK disabled (input and output buffers powered down)
0001: DMCLK is in input mode (can be used as secondary BCLK input, secondary WCLK input,
Dig_Mic_In, or in ClockGen block)
0010: DMCLK is used as general-purpose input (GPI)
0011: DMCLK output = general-purpose output
0100: DMCLK output = CLKOUT output (source determined by cdiv_clkin_reg; page 0 / register 25)
0101: DMCLK output = INT1 output
0110: DMCLK output = INT2 output
0111: Reserved. Do not use.
1000: DMCLK output = secondary BCLK output for codec interface
1001: DMCLK output = secondary WCLK output for codec interface
1010: DMCLK output = ADC_MOD_CLK output for the digital microphone
1011–1111: Reserved. Do not use.
D1
R
0
DMCLK input buffer value
D0
R/W
0
0: DMCLK value = 0 when D5–D2 are programmed to "0011" (general-purpose output)
1: DMCLK value = 1 when D5–D2 are programmed to "0011" (general-purpose output)
Page 0 / Register 52: DMDIN/GPIO1 Control
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7–D6
R
00
Reserved. Do not write any value other than reset value.
D5–D2
R/W
0000
0000: DMDIN disabled (input and output buffers powered down)
0001: DMDIN is in input mode (can be used as secondary BCLK input, secondary WCLK input,
Dig_Mic_In, or in ClockGen block)
0010: DMDIN is used as general-purpose input (GPI)
0011: DMDIN output = general-purpose output
0100: DMDIN output = CLKOUT output (source determined by cdiv_clkin_reg; page 0 / register 25)
0101: DMDIN output = INT1 output
0110: DMDIN output = INT2 output
0111: Reserved. Do not use.
1000: DMDIN output = secondary BCLK output for codec interface
1001: DMDIN output = secondary WCLK output for codec interface
1010: DMDIN output = ADC_MOD_CLK output for the digital microphone
1011–1111: Reserved. Do not use.
D1
R
0
DMDIN Input Buffer Value
D0
R/W
0
0: DMDIN value = 0 when D5–D2 are programmed to "0011" (general-purpose output)
1: DMDIN value = 1 when D5–D2 are programmed to "0011" (general-purpose output)
54
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s) :TLV320ADC3101
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