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| 型號： | TLV320DAC3100IRHBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | DAC WITH PROGRAMMABLE PLL, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數(shù)： | 14/97頁 |
| 文件大小： | 1134K |
| 代理商： | TLV320DAC3100IRHBR |
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www.ti.com
SLAS671 – FEBRUARY 2010
During normal operation, MICBIAS can be set to 2.5 V for better performance. However, depending on the
model of microphone that is selected, optimal performance might be obtained at another setting, so the
performance at a given setting should be verified.
The lowest current consumption occurs when MICBIAS is powered down. The next-lowest current
consumption occurs when MICBIAS is set at AVDD. The highest current consumption occurs when
MICBIAS is set a 2 V.
5.4.2
Analog Inputs AIN1 and AIN2
AIN1 (pin 13) and AIN2 (pin 14) are inputs to the output mixer along with the DAC output. Page 1 /
register 36 provides control signals for determining the signals routed through the output mixer. The output
of the output mixer then can be attenuated or gained through the class-D and/or headphone/lineout
drivers.
5.5
Audio DAC and Audio Analog Outputs
Each channel of the stereo audio DAC consists of a digital audio processing block, a digital interpolation
filter, a digital delta-sigma modulator, and an analog reconstruction filter. The DAC high oversampling ratio
(normally DOSR is between 32 and 128) exhibits good dynamic range by ensuring that the quantization
noise generated within the delta-sigma modulator stays outside of the audio frequency band. Audio analog
outputs include stereo headphone/lineouts and mono class-D speaker outputs.
5.5.1
DAC
The TLV320DAC3100 stereo audio DAC supports data rates from 8 kHz to 192 kHz. Each channel of the
stereo audio DAC consists of a signal-processing engine with fixed processing blocks, a digital
interpolation filter, multibit digital delta-sigma modulator, and an analog reconstruction filter. The DAC is
designed to provide enhanced performance at low sampling rates through increased oversampling and
image filtering, thereby keeping quantization noise generated within the delta-sigma modulator and signal
images strongly suppressed within the audio band to beyond 20 kHz. To handle multiple input rates and
optimize power dissipation and performance, the TLV320DAC3100 allows the system designer to program
the oversampling rates over a wide range from 1 to 1024 by configuring page 0 / register 13 and page 0 /
register 14. The system designer can choose higher oversampling ratios for lower input data rates and
lower oversampling ratios for higher input data rates.
The TLV320DAC3100 DAC channel includes a built-in digital interpolation filter to generate oversampled
data for the delta-sigma modulator. The interpolation filter can be chosen from three different types,
depending on required frequency response, group delay, and sampling rate.
DAC power up is controlled by writing to page 0 / register 63, bit D7 for the left channel and bit D6 for the
right channel. The left-channel DAC clipping flag is provided as a read-only bit on page 0 / register 39,
bit D7. The right-channel DAC clipping flag is provided as a read-only bit on page 0 / register 39, bit D6.
5.5.1.1
DAC Processing Blocks
The TLV320DAC3100 implements signal-processing capabilities and interpolation filtering via processing
blocks. These fixed processing blocks give users the choice of how much and what type of signal
processing they use and which interpolation filter is applied.
The choices among these processing blocks allow the system designer to balance power conservation
and signal-processing flexibility. Table 5-11 gives an overview of all available processing blocks of the
DAC channel and their properties. The resource-class column gives an approximate indication of power
consumption for the digital (DVDD) supply; however, based on the out-of-band noise spectrum, the analog
power consumption of the drivers (HPVDD) may differ.
The signal processing blocks available are:
First-order IIR
Scalable number of biquad filters
Copyright 2010, Texas Instruments Incorporated
APPLICATION INFORMATION
21
Product Folder Link(s): TLV320DAC3100
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| TLV320DAC3100IRHBT | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low-Pwr Stereo Audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC3101 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power Stereo Audio DAC With Audio Processing and Stereo Class-D Speaker Amplifier |
| TLV320DAC3101EVM-U | 功能描述:音頻 IC 開發(fā)工具 TLV320DAC3101EVM-U Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| TLV320DAC3101IRHBR | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low-Pwr audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC3101IRHBT | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low-Pwr audio DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
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