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參數資料
| 型號： | TLV5621IDRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 75 us SETTLING TIME, 8-BIT DAC, PDSO14 |
| 封裝： | GREEN, PLASTIC, SOIC-14 |
| 文件頁數： | 15/19頁 |
| 文件大小： | 321K |
| 代理商： | TLV5621IDRG4 |
TLV5621I
LOW-POWER QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTER
SLAS138B – APRIL 1996 – REVISED FEBRUARY 1997
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
double-buffered mode (MODE = 0)
In this mode, data is only latched to the output of the DACs on the falling edge of the EN strobe. Therefore, all
four DACs can be written to before updating their outputs.
Any number of input data blocks can be written with all having the same length. Subsequent data blocks simply
overwrite previous ones with the same address until EN goes low.
Multiple data blocks can be written in any sequence provided signal timing limits are met. The negative going
edge of EN terminates and latches all data.
Data Latched Into DAC Control Registers and Control Word
Multiple Random Sequence Data Blocks
DATA
EN
Figure 3. Data and Control Serial Control
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| TLV5623 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V LOW POWER 8-BIT DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN |
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