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參數(shù)資料
| 型號： | TLV5621IDRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 75 us SETTLING TIME, 8-BIT DAC, PDSO14 |
| 封裝： | GREEN, PLASTIC, SOIC-14 |
| 文件頁數(shù)： | 2/19頁 |
| 文件大小： | 321K |
| 代理商： | TLV5621IDRG4 |
TLV5621I
LOW-POWER QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTER
SLAS138B – APRIL 1996 – REVISED FEBRUARY 1997
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (VDD – GND)
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range
GND – 0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference input voltage range, VID
GND – 0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA
–40
°C to 85°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–50
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, VDD (see Note 2)
2.7
3.3
5.5
V
High-level digital input voltage, VIH
0.8 VDD
V
Low-level digital input voltage, VIL
0.2 VDD
V
Reference voltage, Vref [A|B|C|D], x1 gain
GND
VDD – 1.5
V
Load resistance, RL
10
k
Setup time, data input, tsu(DATA-CLK) (see Figure 6)
50
ns
Hold time, data input valid after CLK
↓, th(DATA-CLK) (see Figure 6)
50
ns
Setup time, CLK
↓ to EN↓, tsu(CLK-EN) (see Figure 7)
100
ns
Setup time, EN
↑ to CLK↓, tsu(EN-CLK) (see Figure 7) (see Note 3)
100
ns
Pulse duration, EN low, tw(EN) (see Figure 7) (see Note 3)
200
ns
Pulse duration, CLK high, tw(CLK) (see Figure 6) (see Note 3)
400
ns
CLK frequency
1
MHz
Operating free-air temperature, TA
–40
85
°C
NOTES:
2. The device operates over the supply voltage range of 2.7 V to 5.5 V. Over this voltage range the device responds correctly to data
input by changing the output voltage but conversion accuracy is not specified over this extended range.
3. This is specified by design but is not production tested.
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