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參數資料
| 型號： | TMC2360KLC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | COLOR SIGNAL ENCODER, PQFP80 |
| 封裝： | 2.70 MM HEIGHT, MQFP-80 |
| 文件頁數： | 11/24頁 |
| 文件大小： | 158K |
| 代理商： | TMC2360KLC |
PRODUCT SPECIFICATION
TMC2360
19
Applications Discussion
Applications Circuit
Two applications circuits are shown. Figure 15 is the
standard applications circuit. Figure 16 is a simplied circuit
that exploits many of the internal features of the TMC2360.
The standard applications circuit is intended for third party
add-on modules that interface a PC to a TV. Emitter follow-
ers buffer the VGA RGB signals so that VGA monitor
disconnect does not impact the level of the TV image.
Reference clock source is a crystal which requires tuning.
A clock oscillator is recommended. VREF and VTIN are
derived from an external voltage reference with an adjust-
ment potentiometer.
Although intended for VGA controller applications, the
simplied circuit embodies many techniques that can be
exported to other applications. Bandwidth of the incoming
RGB signals is limited to 12 MHz to equalize intensities of
parallel vertical lines. Pull-up resistors compensate for the
bottom offset voltages of the A/D converters. RREF is
comprised of two series resistors which divide down the
voltage for VT. Sinx/x lters are omitted since with 2x
oversampling, losses are small (~ 1 dB). A low pass
equiphase lter in the CVBS channel cuts HF transients for
vectorscope measurements. PLL power is derived from two
separately ltered sources.
Grounding
Analog and digital circuits are separated within the
TMC2360. To keep digital system noise from the A/D and
D/A converters, it is recommended that power supply volt-
ages (VDD and VDDA) originate from the same low-noise
source, and that ground connections (DGND and AGND) be
made to the analog ground plane. Power supply connections
should be individually decoupled at each pin. Digital cir-
cuitry deriving input from the TMC2360 should be referred
to the system digital ground plane.
Printed Circuit Board Layout
Designing with high-performance mixed-signal circuits
demands printed circuits with ground planes. Overall system
performance is strongly inuenced by the board layout.
Capacitive coupling from digital to analog circuits may
result in poor A/D conversion. Consider the following sug-
gestions for layout:
1.
Keep the critical analog traces as short as possible and
as far as possible from all digital signals. Locate the
TMC2360 near the board edge, close to the analog
input/output connectors.
2.
The power plane for the TMC2360 should be separate
from that which supplies the rest of the digital circuitry.
A single power plane should be used for all of the VDD
pins. If the power supply for the TMC2360 is the same
as that of the system's digital circuitry, power to the
TMC2360 should be decoupled with ferrite beads and
0.1
F capacitors to reduce noise.
3.
The ground plane should be solid, not cross-hatched.
Connections to the ground plane should have very short
leads.
4.
Decoupling capacitors should be applied liberally to
VDD pins. Remember that not all power supply pins are
created equal. They supply different circuits on the inte-
grated circuit, each of which generate varying amounts
and types of noise. For best results, use 0.1
F ceramic
capacitors. Lead lengths should be minimized. Ceramic
chip capacitors are the best choice.
5.
If the digital power supply has a dedicated power plane
layer, it should not be placed under the TMC2360, the
voltage reference, or the analog inputs. Capacitive cou-
pling of digital power supply noise from this layer to the
TMC2360 and its related analog circuitry can have an
adverse effect on performance.
The 27 MHz clock reference or crystal should be handled
carefully. Jitter and noise on this clock will degrade perfor-
mance. With an external clock, the line should be terminated
to eliminate overshoot and ringing.
Locate phase locked loop components close to the relevant
TMC2360 pins. Isolate these components from noise.
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