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參數(shù)資料
型號: TMP320C6413ZTSA500
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Fixed-Point Digital Signal Processors
中文描述: 定點(diǎn)數(shù)字信號處理器
文件頁數(shù): 133/140頁
文件大小: 1958K
代理商: TMP320C6413ZTSA500
General-Purpose Input/Output (GPIO) Port Timing
133
April 2004
Revised May 2005
SPRS247E
7.14
General-Purpose Input/Output (GPIO) Port Timing
Table 7
39. Timing Requirements for GPIO Inputs
(see Figure 7
43)
NO.
400
500
UNIT
MIN
8P
8P
MAX
1
2
t
w(GPIH)
t
w(GPIL)
Pulse duration, GPIx high
Pulse duration, GPIx low
ns
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 500 MHz, use P = 2 ns.
The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have the DSP recognize the GPIx
changes through software polling of the GPIO register, the GPIx duration must be extended to at least 12P to allow the DSP enough time to access
the GPIO register through the CFGBUS.
Table 7
40. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs
(see Figure 7
43)
NO.
PARAMETER
400
500
UNIT
MIN
MAX
3
4
t
w(GPOH)
t
w(GPOL)
Pulse duration, GPOx high
Pulse duration, GPOx low
24P
8
§
24P
8
§
ns
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 500 MHz, use P = 2 ns.
§
This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the GPIO
is dependent upon internal bus activity.
GPIx
GPOx
4
3
2
1
Figure 7
43. GPIO Port Timing
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