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參數資料
型號: TMP320F2810PBKS
廠商: Texas Instruments, Inc.
元件分類: 數字信號處理
英文描述: DIGITAL SIGNAL PROCESSORS
中文描述: 數字信號處理器
文件頁數: 61/103頁
文件大小: 1341K
代理商: TMP320F2810PBKS
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
APRIL 2001
REVISED SEPTEMBER 2001
61
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
event manager modules (EVA, EVB)
The event-manager modules include general-purpose (GP) timers, full-compare/PWM units, capture units, and
quadrature-encoder pulse (QEP) circuits. EVA
s and EVB
s timers, compare units, and capture units function
identically. However, timer/unit names differ for EVA and EVB. Table 51 shows the module and signal names
used. Table 51 shows the features and functionality available for the event-manager modules and highlights
EVA nomenclature.
Event managers A and B have identical peripheral register sets with EVA starting at 7400h and EVB starting
at 7500h. The paragraphs in this section describe the function of GP timers, compare units, capture units, and
QEPs using EVA nomenclature. These paragraphs are applicable to EVB with regard to function
however,
module/signal names would differ.
Table 51. Module and Signal Names for EVA and EVB
EVENT MANAGER MODULES
EVA
EVB
MODULE
SIGNAL
MODULE
SIGNAL
GP Timers
GP Timer 1
GP Timer 2
T1PWM/T1CMP
T2PWM/T2CMP
GP Timer 3
GP Timer 4
T3PWM/T3CMP
T4PWM/T4CMP
Compare Units
Compare 1
Compare 2
Compare 3
PWM1/2
PWM3/4
PWM5/6
Compare 4
Compare 5
Compare 6
PWM7/8
PWM9/10
PWM11/12
Capture Units
Capture 1
Capture 2
Capture 3
CAP1
CAP2
CAP3
Capture 4
Capture 5
Capture 6
CAP4
CAP5
CAP6
QEP Channels
QEP1
QEP2
QEPI1
QEP1
QEP2
QEP3
QEP4
QEPI2
QEP3
QEP4
External Clock Inputs
Direction
External Clock
TDIRA
TCLKINA
Direction
External Clock
TDIRB
TCLKINB
External Compare Inputs
Compare
C1TRIP
C2TRIP
C3TRIP
C4TRIP
C5TRIP
C6TRIP
External Trip Inputs
T1CTRIP_PDPINTA
T2CTRIP/EVASOC
T3CTRIP_PDPINTB
T4CTRIP/EVBSOC
In the 24x/240x-compatible mode, the T1CTRIP_PDPINTA pin functions as PDPINTA and the T3CTRIP_PDPINTB pin functions as PDPINTB.
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