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參數(shù)資料
| 型號： | TPA2026D2YZHR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | AUDIO AMPLIFIER, PBGA16 |
| 封裝： | 2.20 X 2.20 MM, GREEN, DSBGA-16 |
| 文件頁數(shù)： | 15/39頁 |
| 文件大小： | 823K |
| 代理商： | TPA2026D2YZHR |
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SLOS649A – MARCH 2010 – REVISED JANUARY 2011
www.ti.com
TPA2026D2 AGC OPERATION
The TPA2026D2 is controlled by the I2C interface. The correct start-up sequence is:
1. Apply the supply voltage to the AVDD and PVDD (L, R) pins.
2. Apply a voltage above VIH to the SDZ pin. The TPA2026D2 powers up the I
2C interface and the control logic.
By default, the device is in active mode (SWS = 0). After 5 ms the amplifier will enable the class-D output
stage and become fully operational.
AGC STARTUP CONDITION
The amplifier gain at start-up depends on the following conditions:
1. Start-up from hardware reset (EN from 0 to 1): The amplifier starts up immediately at default fixed gain. AGC
starts controlling gain once the input audio signal exceeds noise gate threshold.
2. Start-up from software shutdown (SWS from 1 to 0): The amplifier starts up immediately at the latest fixed
gain during software shutdown, regardless the attack/ release time. For example:
–
Audio is playing at fixed gain 6dB
–
Devices goes to software shutdown (SWS = 1)
–
Set fixed gain from 6 dB to 12 dB
–
Remove software shutdown (SWS = 0)
–
Amplifier starts up immediately at 12 dB
3. During audio playback with AGC on, gain changes according to attack/ release time. For example:
–
Audio is playing at fixed gain 6 dB and 1:1 compression ratio
–
Set fixed gain from 6 dB to 12 dB, at release time 500 ms / 6 dB
–
Amplifier will take 500 ms to ramp from 6 dB to 12 dB
4. When SPKR_EN_R = 0, SPKR_EN_L = 0 and SWS = 0, the amplifier is set at fixed gain. The amplifier will
start up at fixed gain when either SPKR_EN_R and SPKR_EN_L transitions from 0 to 1.
CAUTION
Do not interrupt the start-up sequence after changing SDZ from VIL to VIH.
Do not interrupt the start-up sequence after changing SWS from 1 to 0.
The default conditions of TPA2026D2 allows audio playback without I2C control. Refer to Table 4 for the entire
default conditions.
There are several options to disable the amplifier:
Write SPK_EN_R = 0 and SPK_EN_L = 0 to the register (0x01, 6 and 0x01, 7). This write disables each
speaker amplifier, but leaves all other circuits operating.
Write SWS = 1 to the register (0x01, 5). This action disables most of the amplifier functions.
Apply VIL to SDZ. This action shuts down all the circuits and has very low quiescent current consumption.
This action resets the registers to its default values.
CAUTION
Do not interrupt the shutdown sequence after changing SDZ from VIH to VIL.
Do not interrupt the shutdown sequence after changing SWS from 0 to 1.
22
Copyright 2010–2011, Texas Instruments Incorporated
Product Folder Link(s): TPA2026D2
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| TPA2026D2YZHT | 功能描述:音頻放大器 3.2W/Ch Stereo Smart Gain Class-D Aud Amp RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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| TPA2028D1YZFEVM | 制造商:Texas Instruments 功能描述:DEVELOPMENT TOOL |
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