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參數資料
| 型號： | TPA2051D3YFFT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 2.9 W, 2 CHANNEL, AUDIO AMPLIFIER, PBGA25 |
| 封裝： | 2.16 X 2.11 MM, 0.40 MM PITCH, GREEN, WCSP-25 |
| 文件頁數： | 11/34頁 |
| 文件大小： | 1594K |
| 代理商： | TPA2051D3YFFT |
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MODES OF OPERATION
Mux Output Mode
Voice-Mode Bypass
POWER–UP SEQUENCE AND TIMING
www.ti.com ..................................................................................................................................................... SLOS641A – JUNE 2009 – REVISED OCTOBER 2009
The TPA2051D3 supports numerous modes of operation. "Stereo 1" refers to the INL1 and INR1 input pair;
"Stereo 2" refers to the INL2 and INR2 input pair. The "Mono Diff 1" input refers to the differential input at INL1 -
INR1 and "Mono Diff 2" refers to the differential input at INL2 - INR2, which are typically connected to the
differential output of the baseband IC. "Mono" refers to the Mono+ – Mono– differential input.
Use the following sequence to prevent pop when changing modes:
Change Mode[2:0] bits to 111 (Mute)
Change to desired new Mode[2:0]
The input mux selects which device input is directed to both the Class-D and headphone amplifiers. Mux
summing and output are after the channel volume controls, as shown in the Simplified Functional Diagram on
page 2. Control the mux through the Mode[2:0] bits in Mux Output Control (Register 2, Bits 0 – 2) according to
the table below.
HEADPHONE OUTPUT
MODE BYTE:
MUX MODE
SPEAKER OUTPUT
MODE[2:0]
LEFT
RIGHT
0 [000]
Mono Input
Mono+ – Mono–
1 [001]
Mono Diff Input 1
L1 – R1
L1 – R 1
2 [010]
Mono Diff Input 2
L 2 – R 2
3 [011]
Stereo SE Input 1
L1 + R 1
L1
R1
4 [100]
Stereo SE Input 2
L2 + R2
L2
R2
5 [101]
Mono Diff Input 1 + 2
(L1 – R1) + (L2 – R2)
6 [110]
Mono SE Input 1 + 2
(L1 – R1) + (L2 – R2)
(L1 – R1)
(L2 – R2)
7 [111]
MUTE
Enable Voice-Mode Bypass mode by setting VM_Bypass (Register 1, Bit 0) to logic high. This deactivates the
Class-D amplifier regardless of Spk_Enable bit status, and enables the bypass mode around the Class-D amp,
connecting BYPASS+ to OUT+ and BYPASS– to OUT–. This allows the baseband IC to drive the dual-mode
loudspeaker directly without using the Class-D amplifier, saving power and reducing noise for low-power
voice-only phone modes.
The TPA2051D3 startup sequence is shown in Figure 3. It is important to minimize the time delay between
powering up AVDD/PVDD and powering up DVDD in order to minimize potential spikes in the supply current.
It is important to observe the minimum delay time between powering up DVDD and enabling the TPA2051D3
(changing EN pin from LOW to HIGH) in order to prevent spikes in the supply current.
After changing SWS from logic HIGH (amplifier disabled) to logic LOW (amplifier enabled) wait 250
sec, before
After changing Spk_Enable, HPL_Enable, or HPR_Enable from logic LOW (amplifier disabled) to logic HIGH
(amplifier enabled) wait 250
When enabling the Class-D amplifier (Spk_Enable from LOW to HIGH) and/or the headphone amplifiers
(HPL_Enable or HPR_Enable from LOW to HIGH) for the first time after changing EN from LOW to HIGH follow
this sequence:
Set Mode[2:0] to 111
Change VM_Bypass to 0 and Spk_Enable (and/or HPx_Enable) to 1
Change to desired Mode[2:0]
Copyright 2009, Texas Instruments Incorporated
19
Product Folder Link(s): TPA2051D3
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