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P
QSR + PQSR(CON) ) PDIODE ) PQSR(GATE)
(29)
P
QSW(CON) + RDS(on)
I
D
2
+ RDS(on)
V
O
V
IN
I
LOAD
2
) D
I2
12
(30)
P
DIODE + Vf
I
LOAD
t
1 ) t2
f
SW
(31)
K
PWM ^
V
UVLO
1 V
(32)
R
T +
1
f
SW
17.82
10*6
* 23
(33)
SLUS676A – MAY 2006 – REVISED SEPTEMBER 2007
where
P
DIODE = body diode losses
t
1 = body diode conduction prior to turn on of channel = 10 ns for predictive gate drive
t
2 = body diode conduction after turn off of channel = 10 ns for predictive gate drive
V
f = body diode forward voltage
Estimating the body diode losses based on a forward voltage of 1.2 V gives 0.142 W. The gate losses are
unknown at this time so assume 0.1 W gate losses. This leaves 0.258 W for conduction losses. Using this figure
a target RDS(on) of 1.1 m was calculated. This is an extremely low value. It is not possible to meet this without
paralleling multiple MOSFETs. Paralleling MOSFETs increases the gate capacitance and slows down switching
speeds. This increases body diode and gate losses.
The PH2625L from Philips was chosen. Using the parameters from its data sheet the actual expected power
losses were calculated. Conduction loss is 0.527 W, body diode loss is 0.142 W and the gate loss was 0.174 W.
This totals 0.843 W associated with the rectifier MOSFET. This is somewhat greater than the initial allowance.
Because of this the converter may not hit its efficiency figure at the maximum load.
Two other criteria should be verified before finalizing on the rectifier MOSFET. One is the requirement to ensure
that predictive gate drive functions correctly. The maximum turn off delay of the PH2625L is 67 ns. The minimum
turn on delay of the PH6325L is 25 ns. These devices easily meet the 100 ns difference requirement.
Secondly the ratio between Cgs and Cgd should be greater than 1. The Cgs of the PH2625L is 2133 pF and the
Cgd is 1622 pF, so the Cgs:Cgd ratio is 1.3:1. This helps reduce the risk of dv/dt induced turn on of the rectifier
MOSFET. If this is likely to be a problem a small resistor may be added in series with the boost capacitor,
CBOOST.
3.2 Component Selection for TPS40075
3.2.1 Timing Resistor, RT
The timing resistor is calculated using the following equation.
This gives a resistor value of 89.2 k
. Using the E24 range of resistor values a 118-k resistor was selected.
The nominal frequency using this resistor is 398 kHz.
3.2.2 Feed Forward and UVLO Resistor, RKFF
A resistor connected to the KFF pin of the device feeds into the ramp generator. This resistor provides current
into the ramp generator proportional to the input voltage. The ramp is then adjusted to compensate for different
input voltages. Is provides the voltage feed forward feature of the TPS40075.
The same resistor also sets the under voltage lock out point. The input start voltage should be used to calculate
a value for RKFF. For this converter the minimum input voltage is 10.8 V however due to tolerances in the device,
a start voltage of 15% less than the minimum input voltage is selected. The start voltage for RKFF calculation is
28
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