
99% DUTY CYCLE OPERATION
HIGH-SIDE DRIVER
LOW-SIDE DRIVER
CURRENT SENSING SCHEME
CURRENT PROTECTION
I
OCL(DC) + IOCL(PEAK) * 0.5
I
IND(RIPPLE)
(5)
I
OCL(PEAK) +
V
OCL
R
SENSE
(6)
SLVS786A – NOVEMBER 2007 – REVISED MARCH 2009............................................................................................................................................... www.ti.com
In a low-dropout condition such as 5-V input to 5-V output, the basic control loop attempts to maintain 100% of
the high-side MOSFET ON. However, with the N-channel MOSFET used for the top switch, it is not possible to
use the 100% on-cycle to charge the boot strap capacitor. When high duty is required, the TPS51221 extends
the ON period (by skipping a maximum of three clock cycles and reducing the switching frequency to 25% of the
steady state value) and asserts the OFF state after extended ON.
The high-side driver is designed to drive high current, low rDS(on) N-channel MOSFET(s). The drive capability is
represented by its internal resistance, which is 1.7
for VBSTx to DRVHx, and 1.0 for DRVHx to SWx. When
configured as a floating driver, 5V bias voltage is delivered from VREG5 supply. The instantaneous drive current
is supplied by the flying capacitor between VBSTx and SWx pins. The average drive current is equal to the gate
charge at Vgs=5V times the switching frequency. This gate drive current, as well as the low-side gate drive
current times 5V, produces the driving power which needs to be dissipated from the TPS51221 package. A dead
time to prevent shoot-through is internally generated between high-side MOSFET off to low-side MOSFET on,
and low-side MOSFET off to high-side MOSFET on.
The low-side driver is designed to drive high current low RDS(on) N-channel MOSFET(s). The drive capability is
represented by its internal resistance, which is 1.3
for VREG5 to DRVLx, and 0.7 for DRVLx to GND. The
5-V bias voltage is delivered from VREG5 supply. The instantaneous drive current is supplied by an input
capacitor connected between VREG5 and GND. The average drive current is also calculated by the gate charge
at Vgs=5V times switching frequency.
In order to provide both good accuracy and cost effective solution, the TPS51221 supports external resistor
sensing and inductor DCR sensing. An RC network with high quality X5R or X7R ceramic capacitor should be
used to extract voltage drop across DCR. A value of 0.1
F is a good design start. CSPx and CSNx should be
connected to positive and negative terminal of the sensing device, respectively. The TPS51221 has an internal
current amplifier. The gain of the current amplifier, Gc, is selected by TRIP terminal. In any setting, the output
signal of the current amplifier becomes 100mV at the OCL setting point. This means that the current sensing
amplifier normalizes the current information signal based on the OCL setting. Attaching an RC network is
recommended even with a resistor sensing scheme to get accurate current sensing; see section
EXTERNALThe TPS51221 has cycle-by-cycle over-current limiting control. If the inductor current becomes larger than the
over-current trip level, TPS51221 turns off the high-side MOSFET, turns on the low-side MOSFET and waits for
the next clock cycle.
IOCL(PEAK) sets peak level of the inductor current. Thus, the DC load current at over-current threshold, IOCL(DC),
can be calculated as follows;
where
where R
SENSE is resistance of the current-sensing device
V
OCL is the over-current trip threshold voltage, as determined by TRIP pin voltages (shown in Table 3) Table 3. OCL Trip and Discharge Selection
TRIP
GND
VREF2
VREG3
VREG5
VOCL (OCL Trip voltage)
VOCL-ULV (Ultra Low Voltage)
VOCL-LV (Low Voltage)
Discharge
Enable
Disable
Enable
24
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