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參數資料
| 型號： | TPS65167RHAT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 4.9 A SWITCHING REGULATOR, 900 kHz SWITCHING FREQ-MAX, PQCC40 |
| 封裝： | 6 X 6 MM, GREEN, PLASTIC, MO-220VJJD-2, QFN-40 |
| 文件頁數： | 18/41頁 |
| 文件大小： | 1270K |
| 代理商： | TPS65167RHAT |
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High Voltage Switch Control (Gate Voltage Shaping)
CTRL
UVLO
FB
Control
POUT
VGH
Q4
Q5
DRN
Vref
GDLY
IDLY
EN
1kW
Q8
EN
3.5kW
PowerGood
FBP
FBN
PowerGood
Voltage
clamp
5.8Vmax
AVIN
R10
1 kW
Vs
R12
10kW
R11
10kW
Option1
Option3
R13
10kW
Vs
Option2
CTRL =highQ4onQ5off
CTRL =lowQ4offQ5on
EN=lowQ4andQ5off,
Q8on
SLVS760C – APRIL 2007 – REVISED MARCH 2008
Table 11. Output Capacitor Selection Positive Charge Pump
CAPACITOR
COMPONENT SUPPLIER
COMMENT
330 nF/35 V
Taiyo Yuden GMK212BJ334KG
Flying capacitor C9, C20
1
F/35 V
Taiyo Yuden GMK107BJ105KA
Output capacitor on POUT
The TPS65167 has a high voltage switch integrated to provide gate voltage modulation of VGH. If this feature is
not required, then the CTRL pin has to be pulled high or connected to VIN. When the device is disabled or the
input voltage is below the undervoltage lockout (UVLO), then both switches Q4 and Q5 are off, and VGH is
discharge by a 1-k
resistor over Q8, as shown in Figure 27.
Figure 27. High Voltage Switch (Gate Voltage Shaping) Block TPS65167
To implement gate voltage shaping, the control signal from the LCD timing controller (TCON) is connected to
CTRL. The CTRL pin is activated once the device is enabled, the input voltage is above the under voltage
lockout, all the output voltages (Vs, VGL, VGH) are in regulation and the delay time set by the GDLY pin passed
by. As soon as one of the outputs is pulled below its Power Good level, Q4 and Q5 are turned off, and VGH is
discharged via a 1-k
resistor over Q8.
Copyright 2007–2008, Texas Instruments Incorporated
25
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