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參數資料
| 型號： | TSB12C01AWN |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | High-Speed Serial-Bus Link-Layer Controller |
| 中文描述： | 高速串行總線鏈路層控制器 |
| 文件頁數： | 27/59頁 |
| 文件大小： | 275K |
| 代理商： | TSB12C01AWN |
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3–11
3.3
Access to all the transmit FIFOs is fundamentally the same; only the address to where the write is made
changes.
FIFO Access
3.3.1
The TSB12C01A controller FIFO-access address map shown in Figure 3–3 illustrates how the FIFOs are
mapped. The suffix _First denotes a write to the FIFO location where the first quadlet of a packet should
be written when the writer wants the packet to be held in the FIFO until a quadlet is written to an update
location.
General
The suffix _Continue denotes a write to the FIFO location where the second through n–1 quadlets of a packet
could be written.
The suffix _First&Update denotes a write to the FIFO location where the first quadlet of a packet should be
written when the writer wants the packet to be transmitted as soon as possible.
The suffix _Continue&Update denotes a write to the FIFO location where the second through n quadlets
of a packet could be written when the writer wants the packet to be transmitted as soon as possible. The
last quadlet of a multiple quadlet packet should be written to the FIFO location with the notation
_Continue&Update.
0
1
2
3
4
5 6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
ATF_First
ATF_Continue
Reserved
ATF_Continue & Update
ITF_First
ITF_Continue
Reserved
ITF_Continue & Update
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GRF Data
Reserved
Reserved
Reserved
80h
84h
88h
8Ch
90h
94h
98h
9Ch
A0h
A4h
A8h
ACh
B0h
B4h
B8h
BCh
C0h
C4h
C8h
CCh
Figure 3–3. TSB12C01A Controller-FIFO-Access Address Map
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相關代理商/技術參數 |
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