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參數資料
| 型號： | U6220B |
| 英文描述： | 1.3 GHz PLL for TV- and VCR- Tuner |
| 中文描述： | 1.3千兆赫PLL的電視和錄像機，調諧器 |
| 文件頁數： | 2/14頁 |
| 文件大小： | 188K |
| 代理商： | U6220B |
U6220B
TELEFUNKEN Semiconductors
Rev. A2, 23-Sep-96
Preliminary Information
2 (14)
Ordering Information
Extended Type Number
U6220B-APG3
Package
SO16 plastic
Remarks
Taped and reeled
Pin Description
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AS/ENA
SDA
SCL
VHF
VHF L/H
UHF
PD
Q1
RFi
RFi
Vs
MS
FM Trap
P6/Lock
VD
GND
12427
Figure 2. Pinning
Pin
1
2
3
Symbol
PD
Q1
AS/
ENA
SDA
SCL
VHF
VHF L/H
UHF
P6/
Lock
FM Trap
MS
V
S
RFi
RFi
END
VD
Function
Charge pump output
Crystal input
Address select input
Enable input
Data input/ output
Clock input
VHF switch
VHF low/ high switch
UHF switch
Port output (I
2
C bus mode)
Lock output (3-wire bus mode)
Channel 6 FM Trap switch
Mixer switch output
Supply voltage
RF input
RF input
Ground
Active filter output
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
The U6220B is a single cip PLL designed for TV and
VCR receiver systems. It consists of a divide-by-8
prescaler (up to 1.3 GHz) with an integrated preamplifier,
a 15bit programmable divider, a crystal oscillator and a
reference divider with three selectable divider ratios
(
256 /
512 /
1024), a phase/frequency detector
together with a charge-pump, which drives the tuning
amplifier. Only one external transistor is required for
varactor line driving. The device can be controlled via a
I
2
C bus format or 3-wire bus format. It detects
automatically which bus format has been received,
therefore there is no need for a bus selection pin. In I
2
C
bus mode the device has four programmable addresses,
programmed by applying a specific input voltage to the
address select input, enabling the use of up to four
synthesizers in a system. The same pin serves in 3-wire
bus mode as the enable signal input. Five open collector
outputs for band switching functions are included, four of
them are capable of sinking at least 10 mA and the VHF
L/H output can sink 30 mA. One of these open collector
outputs serves as a lock-signal output in the 3-wire bus
mode. The MS output is provided to control directly a
mixer-oscillator IC according to the band switching
information.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| U6220B-APG3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| U6223B-AFP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| U6223B-FP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| U6224B-AFP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| U62256 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:STANDARD 32K X 8 SRAM |
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