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參數(shù)資料
| 型號： | W256H |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 12 Output Buffer for 2 DDR and 3 SRAM DIMMS |
| 中文描述： | 256 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 5.30 MM, SSOP-28 |
| 文件頁數(shù)： | 7/9頁 |
| 文件大小： | 176K |
| 代理商： | W256H |
W256
Document #: 38-07256 Rev. *C
Page 7 of 9
Layout Example Single Voltage
FB
+3.3V Supply or 2.5V Supply
C2
10
μ
F
0.005
μ
F
G
G
VDD
C1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
G = VIA to GND plane layer V =VIA to respective supply plane layer
Note: Each supply plane or strip should have a
ferrite bead and capacitors
All bypass caps = 0.1
μ
F ceramic
Cermaic CapsC1 = 10–22 μF
C2 = 0.005 μF
FB = Dale ILB1206 – 300 (300
@ 100 MHz)
G
V
G
V
G
V
G
V
G
V
W
G
G
G
G
G
G
G
G
G
Ordering Information
Ordering Code
Package Type
Operating Range
W256H
W256HT
Lead Free
CYW256OXC
CYW256OXCT
28-pin SSOP
28-pin SSOP – Tape and Reel
Commercial
Commercial
28-pin SSOP
28-pin SSOP – Tape and Reel
Commercial
Commercial
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