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參數資料
| 型號： | W26L04A |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 128K×16bit High-Speed CMOS Static RAM(128K×16位高速CMOS靜態RAM) |
| 中文描述： | 128K的× 16位高速CMOS靜態RAM（128K的× 16位高速的CMOS靜態RAM）的 |
| 文件頁數： | 7/10頁 |
| 文件大?。?/td> | 144K |
| 代理商： | W26L04A |
Preliminary W26L04A
Publication Release Date: October 1999
- 7 -
Revision A1
Timing Waveforms, continued
Write Cycle 2
(OE = V
IL
Fixed)
Address
WE
D
D
T
T
T
T
T
T
T
(2)
(3)
T
T
WC
AW
WP
OW
WHZ (1, 4)
DW
DH
OH
AS
OUT
IN
CS
T
T
CW
WR
UB/LB
T
BW
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from D
OUT
are the same as the data written to D
IN
during the write cycle.
3. D
OUT
provides the read data for the next address.
4. Transition is measured
±
500 mV from steady state with C
L
= 5 pF. This parameter is guaranteed but not 100% tested.
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