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參數資料
型號: 935269343557
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: 28 X 28 MM, 3.40 MM HEIGHT, ROHS COMPLIANT, PLASTIC, SOT322-2, MS-022, QFP-160
文件頁數: 105/143頁
文件大小: 696K
代理商: 935269343557
2004 Aug 25
64
Philips Semiconductors
Product specication
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
The subsampler collects a number of [XPSC + 2
XACM]
pixels to calculate a new subsampled output pixel. So a
downscale dependent FIR filter is built with up to 65 taps
which reduces anti-aliasing for small sizes. If XACM = 0,
the collecting sequence overlaps which means that the
last pixel of sequence M is also the first pixel of sequence
M+1.
To implement a real subsampler bypass, XACM has to be
set to logic 1.
As the phase correct horizontal fine scaling is limited to a
maximum downscale of 1
4, this circuitry has to be used for
downscales less than 1
4 of the incoming pixel count.
To get unity gain at the subsamplers output for all
subsampling ratios, the scaler register parameters CXY,
CXUV and DCGX have to be used. In addition, this can be
used to modify the FIR characteristic of the subsampler
slightly. Table 57 illustrates examples for scaler register
settings, depending on a given prescale ratio. Referring to
Table 57 (divider in column ‘Weight Sum’) it should be
noted that an internal XPSC depending automatic
prenormalization is valid for:
XPSC > 8, > 16, > 32, which reduces the input signal
quantization. In addition it should be noted that for
XPSC
≥ 15 the LSB of the CXY,CXUV parameter
becomes valid.
Fig.18 Luminance Prefilter: frequency response for miscellaneous register settings.
handbook, full pagewidth
MGG263
0
0.5
18
12
18
24
30
36
6
42
0
6
12
dB
0.1
0.2
0.3
0.4
MHz
0001
0010
0011
1011
1111
PFY3 to PFY0
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935269481115 0.3 A SWITCHING REGULATOR, 57.5 kHz SWITCHING FREQ-MAX, PDSO5
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935269478115 0.3 A SWITCHING REGULATOR, 57.5 kHz SWITCHING FREQ-MAX, PDSO5
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