
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 14: FGPI: Fast General Purpose Interface
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
14-23
5
MBE_SET
R/W
0
Set Memory Bandwidth Error Interrupt
4
UNDERRUN_SET
R/W
0
Set Buffer Underrun Interrupt
3
THRESH2_REACHED_
SET
R/W
0
Set Buffer 2 Threshold Interrupt
2
THRESH1_REACHED_
SET
R/W
0
Set Buffer 2 Threshold Interrupt
1
BUF2_DONE_SET
R/W
0
Set Buffer 2 done Interrupt
0
BUF1_DONE_SET
R/W
0
Set Buffer 1 done Interrupt
Offset 0x07,0FF0
FGPI_SOFT_RST
31:1
Reserved
R
0
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0
SOFTWARE_RESET
R/W
0
1 = Asserts an internal FGPI reset (also output on fgpi_resetn pin)
The effects are:
All FGPI registers are reset
All pending interrupts are removed
Any pending DMA writes are aborted (FIFO’s are cleared)
All state machines return to their reset state
ALL CLOCKS MUST BE RUNNING before the soft reset can
complete.
This bit will clear after the reset completes.
Offset 0x07,0FF4
FGPI_IF_DIS
31:1
Reserved
R
0
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0
DISABLE_BUS_IF
R/W
0
1 = All writes to FGPI MMIO space (except this register) will be
ignored. All reads (except this register) will return 0x00000000.
The FGPI module clock can be stopped low to save power when
this bit is set.
Offset 0x07,0FF8
FGPI_MOD_ID_EXT
31:0
MODULE_ID_EXT
R
0
32-bit Module ID Extension
Offset 0x07,0FFC
FGPI_MOD_ID
31:16
MOD_ID
R
0x014B
16-bit Module ID code
15:12
MAJOR_REV
R
0
4-bit Major Revision code
11:8
MINOR_REV
R
0x1
4-bit Minor Revision code
7:0
APERATURE
R
0
8-bit Aperture code. 0x00 = 4K byte aperture
Table 4: Status Registers
Bit
Symbol
Acces
s
Value
Description