
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 30: DCS Network
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
30-5
16:10
ERR_TOUT_SEL[6:0]
R
0x00
Selected agent during error or timeout
7’b 0000000 = PCI
7’b 0000001 = I2C
7’b 0000010 = CLOCKs
7’b 0000011 = 2DDE
7’b 0000100 = RESET
7’b 0000101 = TMDBG
7’b 0000110 = SYSTEM REGISTERS
7’b 0000111 = MTL ARBITER, a.k.a. IP1010
7’b 0001000 = DDR CONTROLLER, a.k.a. IP2031
7’b 0001001 = FGPI
7’b 0001010 = FGPO
7’b 0001011 = LAN100
7’b 0001100 = LCD
7’b 0001101 = VLD
7’b 0001110 = TM3260
7’b 0001111 = GPIO
7’b 0010000 = VIP
7’b 0010001 = SPDO
7’b 0010010 = SPDI
7’b 0010011 = DVDD
7’b 0010100 = MBS
7’b 0010101 = QVCP
7’b 0010110 = AO
7’b 0010111 = AI
7’b 0011000 = PCI1 Aperture
7’b 0011001 = PCI2 Aperture
7’b 0011010 = XIO Aperture
7’b 0011011 = DMA (TM3260 to PCI space)
7’b 1011100 = Null/Error Target
7’b 1011101 = Network Controller Conguration Aperture
9
Reserved
-
Ignore upon read. Write as zeroes.
8
ERR_TOUT_READ
R
0x0
Value of cmd_read signal during error or timeout
1 = Read operation
0 = Write operation
7:4
ERR_TOUT_MASK[3:0]
R
0x0
Value of cmd_mask during error or timeout
Indicates which bytes were to be read or written.
3:2
Reserved
-
Ignore upon read. Write as zeroes.
1
ERR_ACK
R
0
Error or Timeout
0 = Timeout
1 = Error
0
Reserved
-
Ignore upon read. Write as zeroes.
Offset 0x10 3FD8
BC_INT_CLR_ENABLE
31:2
Reserved
-
Ignore upon read. Write as zeroes.
1
INT_CLR_ENABLE_
TOUT
W
0
Timeout interrupt enable clear register. This is written by software to
clear the interrupt enable (bit 1 of BC_INT_EN).
1 = Timeout interrupt enable is cleared
0 = Timeout interrupt enable is unchanged.
Table 2:
DCS Controller_TriMedia Conguration Registers (Rev 0.32) …Continued
Bit
Symbol
Acces
s
Value
Description