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| 型號： | A3PN125-ZVQG100I |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 3072 CLBS, 125000 GATES, PQFP100 |
| 封裝： | 14 X 14 MM, 1.20 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VQFP-100 |
| 文件頁數(shù)： | 46/100頁 |
| 文件大小： | 3284K |
| 代理商： | A3PN125-ZVQG100I |
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Ad vance v0.6
1-1
1 – ProASIC3 nano Device Overview
General Description
ProASIC3, the third-generation family of Actel flash FPGAs, offers performance, density, and
features beyond those of the ProASICPLUS family. Nonvolatile flash technology gives ProASIC3
nano devices the advantage of being a secure, low-power, single-chip solution that is live at power-
up (LAPU). ProASIC3 nano devices are reprogrammable and offer time-to-market benefits at an
ASIC-level unit cost. These features enable designers to create high-density systems using existing
ASIC or FPGA design flows and tools.
ProASIC3 nano devices offer 1 kbit of on-chip, reprogrammable, nonvolatile FlashROM storage as
well as clock conditioning circuitry based on an integrated phase-locked loop (PLL). A3PN030 and
smaller devices do not have PLL or RAM support. ProASIC3 nano devices have up to 250,000 system
gates, supported with up to 36 kbits of true dual-port SRAM and up to 71 user I/Os.
ProASIC3 nano devices increase the breadth of the ProASIC3 product line by adding new features
and packages for greater customer value in high volume consumer, portable, and battery-backed
markets. Added features include smaller footprint packages designed with two-layer PCBs in mind,
low power, hot-swap capability, and Schmitt trigger for greater flexibility in low-cost and power-
sensitive applications.
Flash Advantages
Reduced Cost of Ownership
Advantages to the designer extend beyond low unit cost, performance, and ease of use. Unlike
SRAM-based FPGAs, flash-based ProASIC3 nano devices allow all functionality to be live at power-
up; no external boot PROM is required. On-board security mechanisms prevent access to all the
programming information and enable secure remote updates of the FPGA logic. Designers can
perform secure remote in-system reprogramming to support future design iterations and field
upgrades with confidence that valuable intellectual property (IP) cannot be compromised or
copied. Secure ISP can be performed using the industry-standard AES algorithm. The ProASIC3
nano device architecture mitigates the need for ASIC migration at higher user volumes. This makes
the ProASIC3 nano device a cost-effective ASIC replacement solution, especially for applications in
the consumer, networking/communications, computing, and avionics markets.
With a variety of devices under $1, Actel ProASIC3 nano FPGAs enable cost-effective
implementation of programmable logic and quick time to market.
Security
Nonvolatile, flash-based ProASIC3 nano devices do not require a boot PROM, so there is no
vulnerable external bitstream that can be easily copied. ProASIC3 nano devices incorporate
FlashLock, which provides a unique combination of reprogrammability and design security without
external overhead, advantages that only an FPGA with nonvolatile flash programming can offer.
ProASIC3 nano devices utilize a 128-bit flash-based lock and a separate AES key to secure
programmed intellectual property and configuration data. In addition, all FlashROM data in
ProASIC3 nano devices can be encrypted prior to loading, using the industry-leading AES-128
(FIPS192) bit block cipher encryption standard. The AES standard was adopted by the National
Institute of Standards and Technology (NIST) in 2000 and replaces the 1977 DES standard. ProASIC3
nano devices have a built-in AES decryption engine and a flash-based AES key that make them the
most comprehensive programmable logic device security solution available today. ProASIC3 nano
devices with AES-based security allow for secure, remote field updates over public networks such as
the Internet, and ensure that valuable IP remains out of the hands of system overbuilders, system
cloners, and IP thieves. The contents of a programmed ProASIC3 nano device cannot be read back,
although secure design verification is possible.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A3PN250-1VQ100 | 功能描述:IC FPGA NANO 250K GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN250-1VQ100I | 功能描述:IC FPGA NANO 250K GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN250-1VQG100 | 功能描述:IC FPGA NANO 250K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN250-1VQG100I | 功能描述:IC FPGA NANO 250K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN250-2QNG100 | 制造商:Microsemi Corporation 功能描述:FPGA PROASIC3 NANO 250K GATES COMM 130NM 1.5V 100QFN - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA PROASIC3 NANO 250K GATES COMM 130NM 1.5V 100QFN - Trays |
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