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參數資料
| 型號： | AD7671 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 16-Bit 1 MSPS SAR Unipolar ADC with Ref |
| 中文描述： | 16位1 MSPS的特區單極型ADC檔 |
| 文件頁數： | 13/23頁 |
| 文件大小： | 336K |
| 代理商： | AD7671 |
REV. PrA
PRELIMINARY TECHNICAL DATA
AD7667
–13–
T able I. Output Codes and Ideal Input Voltages
Digital Output Code
Hexa
Straight
Binary
Analog
Input
T wo’s
C omple-
D
escription
ment
FSR –1 LSB
FSR – 2 LSB
Midscale + 1 LSB
Midscale
Midscale – 1 LSB
–FSR + 1 LSB
–FSR
2.499962 V
2.499923 V
1.250038 V
1.25 V
1.249962 V
38 μV
0 V
F F F F
1
FFFE
8001
8000
7FFF
0001
0000
2
7FFF
1
7FFE
0001
0000
FFFF
8001
8000
2
NOT ES
1
T his is also the code for overrange analog input (V
IN
– V
INGND
above
V
– V
).
2
T his is also the code for underrange analog input (V
IN
below V
INGND
).
T Y PIC AL C ONNE C T ION D IAGRAM
Figure 5 shows a typical connection diagram for the AD7667.
Analog Input
Figure 6 shows an equivalent circuit of the input structure of
the AD7667.
C2
R1
D1
D2
C1
IN
OR INGND
AGND
AVDD
Figure 6. Equivalent Analog Input Circuit
T he two diodes D1 and D2 provide ESD protection for
the analog inputs IN and INGND. Care must be taken to
ensure that the analog input signal never exceeds the supply
rails by more than 0.3 V. T his will cause these diodes to
become forward-biased and start conducting current.
T hese diodes can handle a forward-biased current of 100
mA maximum. For instance, these conditions could eventu-
ally occur when the input buffer’s (U1) supplies are
100nF
10 F
100nF
10 F
AVDD
10 F
100nF
AGND
DGND
DVDD
OVDD
OGND
WARP
IMPULSE
SER/PAR
CNVST
BUSY
SDOUT
SCLK
RD
CS
RESET
PD
IN
INGND
REFGND
REF
100
D
3
CLOCK
AD7667
ANALOG INPUT
(0V TO 2.5V)
C/ P/DSP
SERIAL
PORT
DIGITAL SUPPLY
(3.3V OR 5V)
ANALOG
SUPPLY
(5V)
NOTES:
1
THE CONFIGURATION SHOWN IS USING THE INTERNAL REFERENCE AND INTERNAL BUFFER
2
THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.
3
OPTIONAL LOW JITTER CNVST.
DVDD
C
C
OB/2C
2.7nF
U1
2
15
PDBUF
PDREF
REFBUFIN1
47 F
100 nF
BYTESWAP
Figure 5. Typical Connection Diagram
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