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參數資料
| 型號： | AD7709BR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 16-Bit Sigma Delta ADC with Current Sources, Switchable Reference Inputs and I/O Port |
| 中文描述： | 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | PLASTIC, SOIC-24 |
| 文件頁數： | 12/17頁 |
| 文件大小： | 248K |
| 代理商： | AD7709BR |
AD7709
–12–
REV. PrA J anuary 2001
PRELIMINARY TECHNICAL DATA
Communications Register- ( A1, A0= 0,0):
T he Communications Register is an 8-bit write-only register. All communications to the part must start with a write
operation to the Communications Register. T he data written to the Communications Register determines whether the
next operation is a read or write operation, the type of read operation and to which register this operation takes place.
For read or write operations, once the subsequent read or write operation to the selected register is complete, the inter-
face returns to where it expects a write operation to the Communications Register. T his is the default state of the inter-
face, and on power-up or after a
RESET
, the AD7709 is in this default state waiting for a write operation to the
Communications Register. In situations where the interface sequence is lost, a write operation of at least 32 serial clock
cycles with DIN high, returns the AD7709 to this default state by resetting the part. T able III outlines the bit designa-
tions for the Communications Register. CR0 through CR7 indicate the bit location, CR denoting the bits are in the
Communications Register. CR7 denotes the first bit of the data stream.
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
WEN
( 0)
R/
W
(0)
ST BY (0)
OSCPD (0)
0 (0)
0(0)
A1(0)
A(0)
T able III. Communications Register Bit Designations
Bit
Location
Bit
Mnemonic
Description
C R7
WEN
Write Enable Bit. A 0 must be written to this bit so the write operation to the Communications
Register actually takes place. If a 1 is written to this bit, the part will not clock on to subse-
quent bits in the register. It will stay at this bit location until a 0 is written to this bit. Once a 0
is written to the
WEN
bit, the next seven bits will be loaded to the Communications Register.
C R6
R /
W
A zero in this bit location indicates that the next operation will be a write to a specified regis-
ter. A one in this position indicates that the next operation will be a read from the designated
register.
C R5
ST BY
Standby bit indication.
Set
when its required to put the AD7709 in low power mode.
Clear
to power up the AD7709.
C R4
OSC PD
Oscillator Power Down Bit.
If this bit is
set
, then placing the AD7709 in standby mode will stop the crystal oscillator reduc-
ing the power drawn by these parts to a minimum. T he oscillator will require 500ms to begin
oscillating when the ADC is taken out of standby mode.
If this bit is
cleared
the oscillator is not shut off when the ADC is put into standby mode and
will not require the 500ms start-up time when the ADC is taken out of standby.
C R3
0
T his bit must be programmed with a logic 0 for correct operation.
C R2
0
T his bit must be programmed with a logic 0 for correct operation.
C R1-C R0
A1-A0
Register Address Bits. T hese address bits are used to address the AD7709’s registers and are
outlined in table IV.
Table IV. AD7709 Register Selection Table
A1
A0
Register
0
0
0
1
1
0
0
1
0
1
Communications register during a write operation.
Status Register register during a read operation.
C onfiguration Register
Filter register
ADC Data Register
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