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參數資料
| 型號： | AD7723BS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC |
| 中文描述： | 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL/PARALLEL ACCESS, PQFP44 |
| 封裝： | MO-112-AA, MQFP-44 |
| 文件頁數： | 12/23頁 |
| 文件大?。?/td> | 435K |
| 代理商： | AD7723BS |
AD7723
–12–
REV. 0
TERMINOLOGY
Signal-to-Noise Ratio (SNR)
SNR is the measured signal-to-noise ratio at the output of the
ADC. The signal is the rms magnitude of the fundamental.
Noise is the rms sum of all of the nonfundamental signals up to
half the output data rate (F
O
/2), excluding dc. The ADC is
evaluated by applying a low noise, low distortion sine wave
signal to the input pins. By generating a Fast Fourier Transform
(FFT) plot, the SNR data can then be obtained from the out-
put spectrum.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the harmonics to the rms
value of the fundamental. THD is defined as:
THD
=
20 log
V
2
2
+
V
3
2
+
V
4
V
1
2
+
V
5
2
+
V
6
2
where
V
1
is the rms amplitude of the fundamental and
V
2
,
V
3
,
V
4
,
V
5
and
V
6
are the rms amplitudes of the second through
sixth harmonics. The THD is also derived from the FFT plot of
the ADC output spectrum.
Spurious Free Dynamic Range (SFDR)
Defined as the difference, in dB, between the peak spurious or
harmonic component in the ADC output spectrum (up to F
O
/2
and excluding dc) and the rms value of the fundamental.
Normally, the value of this specification will be determined by
the largest harmonic in the output spectrum of the FFT. For
input signals whose second harmonics occur in the stop band
region of the digital filter, the spur in the noise floor limits the
SFDR.
Passband Ripple
The frequency response variation of the AD7723 in the defined
passband frequency range.
Passband Frequency
The frequency up to which the frequency response variation is
within the passband ripple specification.
Cutoff Frequency
The frequency below which the AD7723’s frequency response
will not have more than 3 dB of attenuation.
Stopband Frequency
The frequency above which the AD7723’s frequency response
will be within its stopband attenuation.
Stopband Attenuation
The AD7723’s frequency response will not have less than 90 dB
of attenuation in the stated frequency band.
Integral Nonlinearity
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The
endpoints of the transfer function are minus full scale, a point
0.5 LSB below the first code transition (100 . . . 00 to 100 . . . 01
in bipolar mode, 000 . . . 00 to 000 . . . 01 in unipolar mode)
and plus full scale, a point 0.5 LSB above the last code transi-
tion (011 . . . 10 to 011 . . . 11 in bipolar mode, 111 . . . 10 to
111 . . . 11 in unipolar mode). The error is expressed in LSBs.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between two adjacent codes in the ADC.
Common-Mode Rejection Ratio
The ability of a device to reject the effect of a voltage applied to
both input terminals simultaneously—often through variation of
a ground level—is specified as a common–mode rejection ratio.
CMRR is the ratio of gain for the differential signal to the gain
for the common-mode signal.
Unipolar Offset Error
Unipolar offset error is the deviation of the first code transition
(10 . . . 000 to 10 . . . 001) from the ideal differential voltage
(VIN(+) – VIN(–)+ 0.5 LSB) when operating in the unipolar
mode.
Bipolar Offset Error
This is the deviation of the midscale transition code (111 . . . 11
to 000 . . . 00) from the ideal differential voltage (VIN(+) –
VIN(–) – 0.5 LSB) when operating in the bipolar mode.
Gain Error
The first code transition should occur at an analog value 1/2 LSB
above –full scale. The last transition should occur for an analog
value 1 1/2 LSB below the nominal full scale. Gain error is the
deviation of the
actual
difference between first and last code
transitions and the
ideal
difference between first and last code
transitions.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7723BS-REEL | 制造商:Analog Devices 功能描述:Single ADC Delta-Sigma 19.2Msps 16-bit Parallel/Serial 44-Pin MQFP T/R |
| AD7723BSZ | 功能描述:IC ADC 16BIT SIGMA-DELTA 44MQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率（每秒）:20M 數據接口:并聯 轉換器數目:2 功率耗散（最大）:155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7723BSZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC |
| AD7723BSZ-REEL | 功能描述:IC ADC 16BIT SIGMA-DELTA 44MQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:- 位數:14 采樣率（每秒）:83k 數據接口:串行，并聯 轉換器數目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數目和類型:1 個單端，雙極 |
| AD7723BSZ-REEL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC |
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