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參數資料
| 型號： | AD7839 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Octal 13-Bit, Parallel Input, Voltage-Output DAC |
| 中文描述： | 八路13位，并行輸入，電壓輸出DAC |
| 文件頁數： | 10/12頁 |
| 文件大小： | 153K |
| 代理商： | AD7839 |
AD7839
–10–
REV. 0
DUTGND Voltage Range
During power-on, the V
OUT
pins of the AD7839 are connected
to the relevant DUTGND pins via G
5
and the 14 k
thin-film
resistor. The DUTGND potential must obey the max ratings at
all times. Thus, the voltage at DUTGND must always be within
the range V
SS
– 0.3 V, V
DD
+ 0.3 V. However, in order that the
voltages at the V
OUT
pins of the AD7839 stay within
±
2 V of the
relevant DUTGND potential during power-on, the voltage
applied to DUTGND should also be kept within the range
GND – 2V, GND + 2 V.
Once the AD7839 has powered on and the on-chip amplifiers
have settled, any voltage that is now applied to the DUTGND
pin is subtracted from the DAC output, which has been gained
up by a factor of two. Thus, for specified operation, the maxi-
mum voltage that can be applied to the DUTGND pin in-
creases to the maximum allowable 2 V
REF
(+) voltage, and the
minimum voltage that can be applied to DUTGND is the
minimum 2 V
REF
(–) voltage. After the AD7839 has fully
powered on, the outputs can track any DUTGND voltage within
this minimum/maximum range.
Power Supply Sequencing
When operating the AD7839, it is important that ground be
connected at all times to avoid high current states. The recom-
mended power-up sequence is V
DD
/V
SS
followed by V
CC
. If V
CC
can exceed V
DD
on power-up, the diode scheme shown in the
absolute max ratings will ensure protection. The reference in-
puts and digital inputs should be powered up last. Should the
references exceed V
DD
/V
SS
on power-up, current limiting resis-
tors should be inserted in series with the reference inputs to
limit the current to 20 mA. Logic inputs should not be applied
before V
CC
. Current limiting resistors (470
), in series with the
logic inputs, should be inserted if these inputs come up before V
CC
.
MICROPROCESSOR INTERFACING
Interfacing the AD7839—16-Bit Interface
The AD7839 can be interfaced to a variety of 16-bit micro-
controllers or DSP processors. Figure 19 shows the AD7839
interfaced to a generic 16-bit microcontroller/DSP processor.
The lower address lines from the processor are connected to A0,
A1 and A2 on the AD7839 as shown. The upper address lines
are decoded to provide a chip select signal or an
LDAC
signal
for the AD7839. The fast interface timing of the AD7839 allows
direct interface to a wide variety of microcontrollers and DSPs
as shown in Figure 19.
AD7839
CONTROLLER/
DSP PROCESSOR*
ADDRESS
DECODE
D12
D0
DATA
BUS
UPPER BITS OF
ADDRESS BUS
A2
A1
A0
R/
W
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 19. AD7839 Parallel Interface
D12
D0
CS
LDAC
A2
A1
A0
WR
APPLICATIONS
Power Supply Bypassing and Grounding
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD7839 is mounted should be designed such that the analog
and digital sections are separated and confined to certain areas
of the board. This facilitates the use of ground planes that can
be easily separated. A minimum etch technique is generally best
for ground planes as it gives the best shielding. Digital and ana-
log ground planes should be joined at only one place. The GND
pin of the AD7839 should be connected to the AGND of the
system. If the AD7839 is in a system where multiple devices
require an AGND-to-DGND connection, the connection should
be made at one point only, a star ground point that should be
established as close as possible to the AD7839.
Digital lines running under the device should be avoided as
these will couple noise onto the die. The analog ground plane
should be allowed to run under the AD7839 to avoid noise
coupling. The power supply lines of the AD7839 should use as
large a trace as possible to provide low impedance paths and
reduce the effects of glitches on the power supply line. Fast
switching signals like clocks should be shielded with digital
ground to avoid radiating noise to other parts of the board and
should never be run near the analog inputs.
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feedthrough through the board. A micro-
strip technique is by far the best but not always possible with a
double sided board. In this technique, the component side of
the board is dedicated to ground plane while signal traces are
placed on the solder side.
The AD7839 should have ample supply bypassing located as
close to the package as possible, ideally right up against the
device. Figure 20 shows the recommended capacitor values of
10
μ
F in parallel with 0.1
μ
F on each of the supplies. The 10
μ
F
capacitors are the tantalum bead type. The 0.1
μ
F capacitor
should have low Effective Series Resistance (ESR) and Effective
Series Inductance (ESI), such as the common ceramic types,
which provide a low impedance path to ground at high frequen-
cies to handle transient currents due to internal logic switching.
10
m
F
0.1
m
F
10
m
F
0.1
m
F
10
m
F
0.1
m
F
V
CC
V
DD
V
SS
AD7839
Figure 20. Recommended Decoupling Scheme for AD7839
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