
AD7851
–20–
REV. A
T able VII. Power Consumption vs. T hroughput
Power
AD7851
T hroughput Rate
1 kSPS
2 kSPS
9 mW
18 mW
THROUGHPUT RATE – Hz
100
10
0.010
2000
200
1
400
600
800
1000 1200 1400 1600 1800
0.1
P
Figure 26. Power vs. Throughput AD7851
NOT E
When setting the power-down mode by writing to the part, it is
recommended to be operating in an interface mode other than
Interface Modes 4, and 5. T his way the user has more control to
initiate power-down, and power-up commands.
CALIBRAT ION SE CT ION
Calibration Overview
T he automatic calibration that is performed on power-up en-
sures that the calibration options covered in this section will not
be required in a significant amount of applications. T he user
will not have to initiate a calibration unless the operating condi-
tions change (CLK IN frequency, analog input mode, reference
voltage, temperature, and supply voltages). T he AD7851 have a
number of calibration features that may be required in some ap-
plications and there are a number of advantages in performing
these different types of calibration. First, the internal errors in
the ADC can be reduced significantly to give superior dc perfor-
mance; and second, system offset and gain errors can be removed.
T his allows the user to remove reference errors (whether it be
internal or external reference) and to make use of the full dy-
namic range of the AD7851 by adjusting the analog input range
of the part for a specific system.
T here are two main calibration modes on the AD7851, self-cali-
bration and system calibration. T here are various options in
both self-calibration and system calibration as outlined previ-
ously in T able III. All the calibration functions can be initiated
by pulsing the
CAL
pin or by writing to the control register and
setting the ST CAL bit to 1. T he timing diagrams that follow in-
volve using the
CAL
pin.
T he duration of each of the different types of calibrations is
given in T able VIII for the AD7851 with a 6 MHz/7 MHz mas-
ter clock. T hese calibration times are master clock dependent.
T able VIII. Calibration T imes (AD7851 with 6 MHz CLKIN)
Type of Self- or System Calibration
T ime
Full
Gain + Offset
Offset
Gain
41.7 ms
9.26 ms
4.63 ms
4.63 ms
Automatic Calibration on Power-On
T he
CAL
pin has a 0.15
μ
A pull-up current source connected to
it internally to allow for an automatic full self-calibration on
power-on. A full self-calibration will be initiated on power-on if
a 10 nF capacitor is connected from the
CAL
pin to AGND.
T he internal current source connected to the
CAL
pin charges
up the external capacitor and the time required to charge the ex-
ternal capacitor will be 100 ms approximately. T his time is large
enough to ensure that the internal reference is settled before the
calibration is performed. However, if an external reference is be-
ing used, this reference must have stabilized before the auto-
matic calibration is initiated (if larger time than 100 ms is
required then a larger capacitor on the
CAL
pin should be
used). After this 100 ms has elapsed, the calibration will be per-
formed which will take 42 ms/36 ms (6 MHz /7 MHz CLK IN).
T herefore 142 ms/136 ms should be allowed before operating
the part. After calibration, the part is accurate to the 14-bit level
and the specifications quoted on the data sheet apply. T here will
be no need to perform another calibration unless the operating
conditions change or unless a system calibration is required.
Self-Calibration Description
T here are a four different calibration options within the self-
calibration mode. T here is a full self-calibration where the
DAC, internal offset, and internal gain errors are calibrated out.
T hen, there is the (Gain + Offset) self-calibration which cali-
brates out the internal gain error and then the internal offset er-
rors. T he internal DAC is not calibrated here. Finally, there are
the self-offset and self-gain calibrations which calibrate out the
internal offset errors and the internal gain errors respectively.
T he internal capacitor DAC is calibrated by trimming each of
the capacitors in the DAC. It is the ratio of these capacitors to
each other that is critical, and so the calibration algorithm en-
sures that this ratio is at a specific value by the end of the cali-
bration routine. For the offset and gain there are two separate
capacitors, one of which is trimmed when an offset or gain cali-
bration is performed. Again it is the ratio of these capacitors to
the capacitors in the DAC that is critical and the calibration al-
gorithm ensures that this ratio is at a specified value for both the
offset and gain calibrations.
In bipolar mode the midscale error is adjusted for an offset
calibration and the positive full-scale error is adjusted for the
gain calibration; in unipolar mode the zero-scale error is ad-
justed for an offset calibration and the positive full-scale error is
adjusted for a gain calibration.